Issued Patents All Time
Showing 101–125 of 739 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11822822 | Memory component having internal read-modify-write operation | Thomas Vogelsang | 2023-11-21 |
| 11823732 | High capacity memory system using standard controller component | Suresh Rajan, Scott C. Best | 2023-11-21 |
| 11815940 | Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules | Ely Tsern, John Eric Linstadt, Thomas J. Giovannini, Kenneth L. Wright | 2023-11-14 |
| 11809712 | Memory system with threaded transaction support | Ely Tsern | 2023-11-07 |
| 11811397 | Overdriven switch | Carl W. Werner | 2023-11-07 |
| 11804259 | Floating body dram with reduced access energy | John Eric Linstadt, Zhichao Lu, Kenneth L. Wright | 2023-10-31 |
| 11804250 | Memory with deferred fractional row activation | James E. Harris, Thomas Vogelsang, Ian Shaeffer | 2023-10-31 |
| 11803323 | Cascaded memory system | Christopher Haywood | 2023-10-31 |
| 11803328 | Memory with variable access granularity | — | 2023-10-31 |
| 11797227 | Memory controller for micro-threaded memory operations | Craig E. Hampel, Wayne S. Richardson, Chad A. Bellows, Lawrence Lai | 2023-10-24 |
| 11790973 | Memory component with efficient write operations | John Eric Linstadt, Brent Haukness, Kenneth L. Wright, Thomas Vogelsang | 2023-10-17 |
| 11790962 | Strobe acquisition and tracking | Bret G. Stott, Ian Shaeffer, Yuanlong Wang | 2023-10-17 |
| 11782807 | Memory module with dedicated repair devices | Brent Haukness, John Eric Linstadt, Scott C. Best | 2023-10-10 |
| 11782788 | Error-correction-detection coding for hybrid memory module | — | 2023-10-10 |
| 11775369 | Memory controller with error detection and retry modes of operation | Ely Tsern, Mark A. Horowitz | 2023-10-03 |
| 11768790 | MAC processing pipelines, circuitry to control and configure same, and methods of operating same | Cheng C. Wang | 2023-09-26 |
| 11762737 | Memory component with error-detect-correct code interface | Brent Haukness, Lawrence Lai | 2023-09-19 |
| 11755509 | Deterministic operation of storage class memory | Brent Haukness | 2023-09-12 |
| 11755508 | High-performance, high-capacity memory systems and modules | Ely Tsern, John Eric Linstadt, Thomas J. Giovannini, Craig E. Hampel, Scott C. Best +1 more | 2023-09-12 |
| 11755507 | Memory module threading with staggered data transfers | Hongzhong Zheng | 2023-09-12 |
| 11755220 | Adjustable access energy and access latency memory system and devices | John Eric Linstadt | 2023-09-12 |
| 11749336 | Low-power source-synchronous signaling | Jared L. Zerbe | 2023-09-05 |
| 11734106 | Memory repair method and apparatus based on error code tracking | Ely Tsern | 2023-08-22 |
| 11727966 | Memory controllers, systems, and methods supporting multiple request modes | Richard E. Perego | 2023-08-15 |
| 11714752 | Nonvolatile physical memory with DRAM cache | John Eric Linstadt, Christopher Haywood | 2023-08-01 |