Stuart E. Greer — 14 Patents at Motorola

Stuart E. Greer has been granted 14 US patents while listed as an inventor at Motorola. The first was granted in 1980 and the most recent in March 2004. Stuart E. Greer ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Stuart E. Greer in Poughkeepsie, NY, US.

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
6713381	Method of forming semiconductor device including interconnect barrier layers	Alexander L. Barr, Suresh Venkatesan, David B. Clegg, Rebecca G. Cole, Olubunmi O. Adetutu +5 more	2004-03-30	$19,188,000
6689680	Semiconductor device and method of formation	—	2004-02-10	$22,583,000
6451681	Method of forming copper interconnection utilizing aluminum capping film	—	2002-09-17	$10,901,000
6346469	Semiconductor device and a process for forming the semiconductor device	—	2002-02-12	$27,243,000
6117759	Method for multiplexed joining of solder bumps to various substrates during assembly of an integrated circuit package	David B. Clegg, Terry Burnette	2000-09-12	$44,805,000
6107180	Method for forming interconnect bumps on a semiconductor die	Robert A. Munroe	2000-08-22	$32,942,000
5597737	Method for testing and burning-in a semiconductor wafer	Joel P. Dietz, Aubrey K. Sparkman	1997-01-28	$15,240,000
5470787	Semiconductor device solder bump having intrinsic potential for forming an extended eutectic region and method for making and using the same	—	1995-11-28	$11,831,000
5468655	Method for forming a temporary attachment between a semiconductor die and a substrate using a metal paste comprising spherical modules	—	1995-11-21	$10,301,000
5104695	Method and apparatus for vapor deposition of material onto a substrate	Eric Ernest Millham, Adolf E. Wirsing	1992-04-14	$18,679,000
4861425	Lift-off process for terminal metals	Robert Howard	1989-08-29	$11,671,000
4602271	Personalizable masterslice substrate for semiconductor chips	William E. Dougherty, Jr., William J. Nestork, William T. Norris	1986-07-22	$23,573,000
4598470	Method for providing improved electrical and mechanical connection between I/O pin and transverse via substrate	William E. Dougherty, Jr., Robert W. Sargent	1986-07-08	$22,430,000
4202007	Multi-layer dielectric planar structure having an internal conductor pattern characterized with opposite terminations disposed at a common edge surface of the layers	William E. Dougherty, Jr.	1980-05-06	$13,704,000

Stuart E. Greer — 14 Patents

Issued Patents All Time

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