Issued Patents All Time
Showing 76–100 of 195 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6157052 | Semiconductor integrated circuit having three wiring layers | Shigehiro Kuge | 2000-12-05 |
| 6151244 | Dynamic semiconductor memory device | Takeshi Fujino | 2000-11-21 |
| 6150728 | Semiconductor memory device having a pad arrangement with reduced occupying area | Masaki Tsukude | 2000-11-21 |
| 6134171 | Semiconductor integrated circuit device having hierarchical power source arrangement | Tadato Yamagata, Masaki Tsukude | 2000-10-17 |
| 6118715 | Semiconductor memory device having improved manner of data line connection in hierarchical data line structure | — | 2000-09-12 |
| RE36842 | Semiconductor memory device for maintaining level of signal line | Shigeki Tomishima, Hideto Hidaka | 2000-08-29 |
| 6100563 | Semiconductor device formed on SOI substrate | — | 2000-08-08 |
| 6097665 | Dynamic semiconductor memory device having excellent charge retention characteristics | Shigeki Tomishima | 2000-08-01 |
| 6088286 | Word line non-boosted dynamic semiconductor memory device | Tadaaki Yamauchi | 2000-07-11 |
| 6075732 | Semiconductor memory device with redundancy circuit | Tsukasa Ooishi, Yoshio Matsuda, Masaki Tsukude, Kazuyasu Fujishima | 2000-06-13 |
| 6072743 | High speed operable semiconductor memory device with memory blocks arranged about the center | Teruhiko Amano, Takahiro Tsuruda, Tetsushi Tanizaki, Takeshi Fujino, Mitsuya Kinoshita +2 more | 2000-06-06 |
| 6069379 | Semiconductor device and method of manufacturing the same | Hiroshi Kimura, Tadashi Nishimura, Takahiro Tsuruda, Tadato Yamagata, Kazuyasu Fujishima | 2000-05-30 |
| 6064621 | Multi-bank clock synchronous type semiconductor memory device having improved memory array and power supply arrangement | Tetsushi Tanizaki, Mitsuya Kinoshita, Takeshi Fujino, Takahiro Tsuruda, Fukashi Morishita +2 more | 2000-05-16 |
| 6046476 | SOI input protection circuit | Fukashi Morishita | 2000-04-04 |
| 6004834 | Method of manufacturing semiconductor device having a fuse | Masaki Tsukude | 1999-12-21 |
| 5982678 | Semiconductor memory device with redundancy circuit | Tsukasa Ooishi, Yoshio Matsuda, Masaki Tsukude, Kazuyasu Fujishima | 1999-11-09 |
| 5969420 | Semiconductor device comprising a plurality of interconnection patterns | Shigehiro Kuge, Masaki Tsukude, Kazuyasu Fujishima | 1999-10-19 |
| 5963491 | Semiconductor memory | — | 1999-10-05 |
| 5959927 | Semiconductor integrated circuit device having hierarchical power source arrangement | Tadato Yamagata, Masaki Tsukude | 1999-09-28 |
| 5959918 | Semiconductor memory device having improved manner of data line connection in hierarchical data line structure | — | 1999-09-28 |
| 5946252 | Semiconductor memory device having improved manner of data line connection in hierarchical data line structure | — | 1999-08-31 |
| 5943273 | Semiconductor memory device | Hideto Hidaka, Mikio Asakura, Kazuyasu Fujishima, Tsukasa Ooishi, Shigeki Tomishima +1 more | 1999-08-24 |
| 5914907 | Semiconductor memory device capable of increasing chip yields while maintaining rapid operation | Mako Kobayashi, Tetsushi Tanizaki, Teruhiko Amano, Takeshi Fujino, Takahiro Tsuruda +2 more | 1999-06-22 |
| 5909046 | Semiconductor integrated circuit device having stable input protection circuit | Tetsushi Tanizaki, Fukashi Morishita, Masaki Tsukude | 1999-06-01 |
| 5903507 | Semiconductor memory device with reduced current consumption in data holding mode | — | 1999-05-11 |