Issued Patents All Time
Showing 26–50 of 195 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6909658 | Semiconductor memory device with row selection control circuit | Hiroki Shimano | 2005-06-21 |
| 6898137 | Semiconductor memory device with high-speed sense amplifier | Hiroki Shimano | 2005-05-24 |
| 6859403 | Semiconductor memory device capable of overcoming refresh disturb | Hideto Hidaka, Mikio Asakura, Kazuyasu Fujishima, Tsukasa Ooishi, Shigeki Tomishima +1 more | 2005-02-22 |
| 6804164 | Low-power consumption semiconductor memory device | Takeshi Fujino, Hiroki Shimano | 2004-10-12 |
| 6785157 | Semiconductor memory device having a memory cell structure of reduced occupying area | Hiroki Shimano | 2004-08-31 |
| 6781915 | Semiconductor memory device | Hiroki Shimano | 2004-08-24 |
| 6744684 | Semiconductor memory device with simple refresh control | Hiroki Shimano | 2004-06-01 |
| 6649984 | Logic-merged memory | Hideyuki Noda, Katsumi Dosaka, Takeshi Fujino | 2003-11-18 |
| 6643208 | Semiconductor integrated circuit device having hierarchical power source arrangement | Tadato Yamagata, Masaki Tsukude | 2003-11-04 |
| 6636454 | Low-power consumption semiconductor memory device | Takeshi Fujino, Hiroki Shimano | 2003-10-21 |
| 6608795 | Semiconductor device including memory with reduced current consumption | Hiroki Shimano | 2003-08-19 |
| 6597599 | Semiconductor memory | Toshinori Morihara, Hiroki Shimano, Katsumi Dosaka | 2003-07-22 |
| 6573613 | Semiconductor memory device having cell plate electrodes allowing independent power supply for each redundant replacement unit | Hiroki Shimano | 2003-06-03 |
| 6525984 | Semiconductor integrated circuit device having hierarchical power source arrangement | Tadato Yamagata, Masaki Tsukude | 2003-02-25 |
| 6507532 | Semiconductor memory device having row-related circuit operating at high speed | Takeshi Fujino, Kazunari Inoue, Akira Yamazaki | 2003-01-14 |
| 6498396 | Semiconductor chip scale package and ball grid array structures | — | 2002-12-24 |
| 6486493 | Semiconductor integrated circuit device having hierarchical test interface circuit | Hiroki Shimano | 2002-11-26 |
| 6483139 | Semiconductor memory device formed on semiconductor substrate | Hiroki Shimano | 2002-11-19 |
| 6477108 | Semiconductor device including memory with reduced current consumption | Hiroki Shimano | 2002-11-05 |
| 6459113 | Semiconductor integrated circuit device and method of manufacturing the same, and cell size calculation method for DRAM memory cells | Toshinori Morihara, Hiroki Shimano | 2002-10-01 |
| 6456560 | Semiconductor integrated circuit device with test interface circuit for performing test on embedded memory from outside | Hiroki Shimano | 2002-09-24 |
| 6452859 | Dynamic semiconductor memory device superior in refresh characteristics | Hiroki Shimano, Katsumi Dosaka | 2002-09-17 |
| 6448602 | Semiconductor memory device with improved arrangement of memory blocks and peripheral circuits | Narumi Sakashita | 2002-09-10 |
| 6449204 | DYNAMIC SEMICONDUCTOR MEMORY DEVICE CAPABLE OF REARRANGING DATA STORAGE FROM A ONE BIT/ONE CELL SCHEME IN A NORMAL MODE TO A ONE BIT/TWO CELL SCHEME IN A TWIN-CELL MODE FOR LENGTHENING A REFRESH INTERVAL | Hiroki Shimano, Takeshi Fujino, Takeshi Hashizume | 2002-09-10 |
| 6442078 | Semiconductor memory device having structure implementing high data transfer rate | — | 2002-08-27 |