Issued Patents All Time
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9503018 | Semiconductor device | Toshiaki Tsutsumi, Yoshihiro Funato, Tomonori Okudaira, Akihisa Uchida, Takeshi Terasaki +2 more | 2016-11-22 |
| 9252793 | Semiconductor device | Toshiaki Tsutsumi, Yoshihiro Funato, Tomonori Okudaira, Akihisa Uchida, Takeshi Terasaki +2 more | 2016-02-02 |
| RE39579 | Semiconductor integrated circuit device comprising RAM with command decode system and logic circuit integrated into a single chip and testing method of the RAM with command decode system | Makoto Hatakenaka, Akira Yamazaki, Shigeki Tomishima | 2007-04-17 |
| 6859377 | Dynamic associative memory device | — | 2005-02-22 |
| 6844754 | Data bus | — | 2005-01-18 |
| 6650588 | Semiconductor memory module and register buffer device for use in the same | — | 2003-11-18 |
| 6643208 | Semiconductor integrated circuit device having hierarchical power source arrangement | Kazutami Arimoto, Masaki Tsukude | 2003-11-04 |
| 6525984 | Semiconductor integrated circuit device having hierarchical power source arrangement | Kazutami Arimoto, Masaki Tsukude | 2003-02-25 |
| 6515922 | Memory module | — | 2003-02-04 |
| 6341098 | Semiconductor integrated circuit device having hierarchical power source arrangement | Kazutami Arimoto, Masaki Tsukude | 2002-01-22 |
| 6310815 | Multi-bank semiconductor memory device suitable for integration with logic | Akira Yamazaki, Shigeki Tomishima, Yoshio Yukinari, Makoto Hatakenaka, Atsushi Miyanishi | 2001-10-30 |
| 6246625 | Semiconductor integrated circuit device having hierarchical power source arrangement | Kazutami Arimoto, Masaki Tsukude | 2001-06-12 |
| 6214664 | Method of manufacturing semiconductor device | Hiroshi Kimura, Tadashi Nishimura, Takahiro Tsuruda, Kazutami Arimoto, Kazuyasu Fujishima | 2001-04-10 |
| 6163493 | Semiconductor integrated circuit device with large internal bus width, including memory and logic circuit | Makoto Hatakenaka, Shigeki Tomishima, Akira Yamazaki | 2000-12-19 |
| 6134171 | Semiconductor integrated circuit device having hierarchical power source arrangement | Kazutami Arimoto, Masaki Tsukude | 2000-10-17 |
| 6069379 | Semiconductor device and method of manufacturing the same | Hiroshi Kimura, Tadashi Nishimura, Takahiro Tsuruda, Kazutami Arimoto, Kazuyasu Fujishima | 2000-05-30 |
| 5959927 | Semiconductor integrated circuit device having hierarchical power source arrangement | Kazutami Arimoto, Masaki Tsukude | 1999-09-28 |
| 5930194 | Semiconductor memory device capable of block writing in large bus width | Akira Yamazaki, Shigeki Tomishima, Makoto Hatakenaka, Masashi Matsumura | 1999-07-27 |
| 5910181 | Semiconductor integrated circuit device comprising synchronous DRAM core and logic circuit integrated into a single chip and method of testing the synchronous DRAM core | Makoto Hatakenaka, Akira Yamazaki, Shigeki Tomishima | 1999-06-08 |
| 5798974 | Semiconductor memory device realizing high speed access and low power consumption with redundant circuit | — | 1998-08-25 |
| 5726943 | Fast memory device allowing suppression of peak value of operational current | Kazutami Arimoto | 1998-03-10 |
| 5726946 | Semiconductor integrated circuit device having hierarchical power source arrangement | Kazutami Arimoto, Masaki Tsukude | 1998-03-10 |
| 5677889 | Static type semiconductor device operable at a low voltage with small power consumption | Yoshiyuki Haraguchi | 1997-10-14 |
| 5650978 | Semiconductor memory device having data transition detecting function | Motomu Ukita, Yoshiyuki Haraguchi, Kunihiko Kozaru | 1997-07-22 |
| 5572469 | Static random access memory device having a single bit line configuration | Kenji Anami, Toshihiko Hirose, Shuji Murakami, Kojiro Yuzuriha | 1996-11-05 |