Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7505352 | Parallel operational processing device | Takayuki Gyoten, Katsumi Dosaka, Hideyuki Noda | 2009-03-17 |
| 7032141 | Semiconductor device including test-facilitating circuit using built-in self test circuit | — | 2006-04-18 |
| 7007215 | Test circuit capable of testing embedded memory with reliability | Mitsuya Kinoshita, Masaru Haraguchi, Katsumi Dosaka | 2006-02-28 |
| 6993696 | Semiconductor memory device with built-in self test circuit operating at high rate | Kazushi Sugiura, Masami Nakajima | 2006-01-31 |
| 6962827 | Semiconductor device capable of shortening test time and suppressing increase in chip area, and method of manufacturing semiconductor integrated circuit device | Katsuya Furue, Shigeru Kikuda, Kiyohiro Furutani, Shigehiro Kuge, Takashi Kono | 2005-11-08 |
| 6782498 | Semiconductor memory device allowing mounting of built-in self test circuit without addition of interface specification | Takeshi Hamamoto | 2004-08-24 |
| 6779139 | Circuit for reducing test time and semiconductor memory device including the circuit | Masaru Haraguchi, Katsumi Dosaka | 2004-08-17 |
| 6762967 | Semiconductor memory device having a circuit for fast operation | Katsumi Dosaka, Mikio Asakura | 2004-07-13 |
| 6704229 | Semiconductor test circuit for testing a semiconductor memory device having a write mask function | Masaru Haraguchi | 2004-03-09 |
| 6614713 | Semiconductor memory device having a circuit for fast operation | Katsumi Dosaka, Mikio Asakura | 2003-09-02 |
| 6496429 | Semiconductor memory device | Yasumitsu Murai, Masaru Haraguchi | 2002-12-17 |
| 6337506 | Semiconductor memory device capable of performing stable operation for noise while preventing increase in chip area | Fukashi Morishita, Teruhiko Amano, Kazutami Arimoto, Takeshi Fujino, Takahiro Tsuruda +2 more | 2002-01-08 |
| 6335645 | Semiconductor integrated circuit having built-in self-test circuit | Yukikazu Matsuo, Masami Nakajima | 2002-01-01 |
| 6327198 | Semiconductor memory device having a test mode setting circuit | Tetsuo Kato, Takayuki Miyamoto, Mikio Asakura | 2001-12-04 |
| 6295238 | Semiconductor memory device having a circuit for fast operation | Katsumi Dosaka, Mikio Asakura | 2001-09-25 |
| 6288956 | Semiconductor device having test function | Tetsuo Kato, Mikio Asakura, Yasuhiro Konishi, Takayuki Miyamoto | 2001-09-11 |
| 6272034 | Semiconductor memory device | Mitsuya Kinoshita, Fukashi Morishita, Kazutami Arimoto, Takeshi Fujino, Takahiro Tsuruda +2 more | 2001-08-07 |
| 6215720 | High speed operable semiconductor memory device with memory blocks arranged about the center | Teruhiko Amano, Takahiro Tsuruda, Kazutami Arimoto, Takeshi Fujino, Mitsuya Kinoshita +2 more | 2001-04-10 |
| 6072743 | High speed operable semiconductor memory device with memory blocks arranged about the center | Teruhiko Amano, Takahiro Tsuruda, Kazutami Arimoto, Takeshi Fujino, Mitsuya Kinoshita +2 more | 2000-06-06 |
| 6064621 | Multi-bank clock synchronous type semiconductor memory device having improved memory array and power supply arrangement | Mitsuya Kinoshita, Takeshi Fujino, Takahiro Tsuruda, Fukashi Morishita, Teruhiko Amano +2 more | 2000-05-16 |
| 6038186 | Semiconductor memory device that can have power consumption reduced during self refresh mode | — | 2000-03-14 |
| 5914907 | Semiconductor memory device capable of increasing chip yields while maintaining rapid operation | Mako Kobayashi, Kazutami Arimoto, Teruhiko Amano, Takeshi Fujino, Takahiro Tsuruda +2 more | 1999-06-22 |
| 5909046 | Semiconductor integrated circuit device having stable input protection circuit | Fukashi Morishita, Masaki Tsukude, Kazutami Arimoto | 1999-06-01 |
| 5896328 | Semiconductor memory device allowing writing of desired data to a storage node of a defective memory cell | Masaki Tsukude | 1999-04-20 |
| 5386387 | Semiconductor memory device including additional memory cell block having irregular memory cell arrangement | — | 1995-01-31 |