Issued Patents All Time
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8581302 | Semiconductor device including chip with complementary I/O cells | Motoo Suwa, Akinobu Watanabe, Shigezumi Matsui | 2013-11-12 |
| 7007215 | Test circuit capable of testing embedded memory with reliability | Tetsushi Tanizaki, Masaru Haraguchi, Katsumi Dosaka | 2006-02-28 |
| 6930950 | Semiconductor memory device having self-precharge function | Hideyuki Noda | 2005-08-16 |
| 6854078 | Multi-bit test circuit | Katsumi Dosaka | 2005-02-08 |
| 6845056 | Semiconductor memory device with reduced power consumption | — | 2005-01-18 |
| 6704231 | Semiconductor memory device with circuit executing burn-in testing | Fukashi Morishita | 2004-03-09 |
| 6586329 | Semiconductor device and a method of manufacturing thereof | Yoshinori Tanaka, Shinya Watanabe, Tatsuo Kasaoka, Moriaki Akazawa, Toshiaki Ogawa | 2003-07-01 |
| 6407538 | Voltage down converter allowing supply of stable internal power supply voltage | Fukashi Morishita | 2002-06-18 |
| 6337506 | Semiconductor memory device capable of performing stable operation for noise while preventing increase in chip area | Fukashi Morishita, Teruhiko Amano, Kazutami Arimoto, Tetsushi Tanizaki, Takeshi Fujino +2 more | 2002-01-08 |
| 6272034 | Semiconductor memory device | Fukashi Morishita, Kazutami Arimoto, Takeshi Fujino, Tetsushi Tanizaki, Takahiro Tsuruda +2 more | 2001-08-07 |
| 6215720 | High speed operable semiconductor memory device with memory blocks arranged about the center | Teruhiko Amano, Takahiro Tsuruda, Kazutami Arimoto, Tetsushi Tanizaki, Takeshi Fujino +2 more | 2001-04-10 |
| 6097052 | Semiconductor device and a method of manufacturing thereof | Yoshinori Tanaka, Shinya Watanabe, Tatsuo Kasaoka, Moriaki Akazawa, Toshiaki Ogawa | 2000-08-01 |
| 6084386 | Voltage generation circuit capable of supplying stable power supply voltage to load operating in response to timing signal | Mitsue Takahashi, Tadaaki Yamauchi | 2000-07-04 |
| 6072743 | High speed operable semiconductor memory device with memory blocks arranged about the center | Teruhiko Amano, Takahiro Tsuruda, Kazutami Arimoto, Tetsushi Tanizaki, Takeshi Fujino +2 more | 2000-06-06 |
| 6064621 | Multi-bank clock synchronous type semiconductor memory device having improved memory array and power supply arrangement | Tetsushi Tanizaki, Takeshi Fujino, Takahiro Tsuruda, Fukashi Morishita, Teruhiko Amano +2 more | 2000-05-16 |
| 5914907 | Semiconductor memory device capable of increasing chip yields while maintaining rapid operation | Mako Kobayashi, Tetsushi Tanizaki, Kazutami Arimoto, Teruhiko Amano, Takeshi Fujino +2 more | 1999-06-22 |
| 5892702 | Semiconductor memory device and method of manufacturing the same | Tatsuo Okamoto, Atsushi Hachisuka, Hideaki Arima | 1999-04-06 |
| 5580813 | Method of forming a semiconductor memory device having a contact region between memory cell and an interlayer insolating layer | Atsushi Hachisuka, Kazuhiro Tsukamoto | 1996-12-03 |
| 5578861 | Semiconductor device having redundant circuit | Atsushi Hachisuka, Kazuhiro Tsukamoto | 1996-11-26 |
| 5574729 | Redundancy circuit for repairing defective bits in semiconductor memory device | Shigeru Mori, Yoshikazu Morooka, Hiroshi Miyamoto, Shigeru Kikuda, Makoto Suwa | 1996-11-12 |
| 5506164 | Method of manufacturing a semiconductor device having a cylindrical capacitor | Tatsuo Okamoto, Hideaki Arima, Atsushi Hachisuka | 1996-04-09 |
| 5448512 | Semiconductor memory device with contact region intermediate memory cell and peripheral circuit | Atsushi Hachisuka, Kazuhiro Tsukamoto | 1995-09-05 |
| 5408114 | Semiconductor memory device having cylindrical capacitor and manufacturing method thereof | Tatsuo Okamoto, Hideaki Arima, Atsushi Hachisuka | 1995-04-18 |
| 5384784 | Semiconductor memory device comprising a test circuit and a method of operation thereof | Shigeru Mori, Makoto Suwa, Hiroshi Miyamoto, Yoshikazu Morooka, Shigeru Kikuda | 1995-01-24 |
| 5357478 | Semiconductor integrated circuit device including a plurality of cell array blocks | Shigeru Kikuda, Shigeru Mori, Yoshikazu Morooka, Hiroshi Miyamoto, Makoto Suwa | 1994-10-18 |