Issued Patents All Time
Showing 51–75 of 89 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6307405 | Current sense amplifier and current comparator with hysteresis | Leonard Forbes | 2001-10-23 |
| 6297989 | Applications for non-volatile memory cells | Wendell P. Noble | 2001-10-02 |
| 6292009 | Reduced terminal testing system | Warren M. Farnworth, Leland R. Nevill, Raymond J. Beffa | 2001-09-18 |
| 6281042 | Structure and method for a high performance electronic packaging assembly | Kie Y. Ahn, Leonard Forbes | 2001-08-28 |
| 6256225 | Construction and application for non-volatile reprogrammable switches | Wendell P. Noble | 2001-07-03 |
| 6249460 | Dynamic flash memory cells with ultrathin tunnel oxides | Leonard Forbes, Luan C. Tran, Alan R. Reinberg, Joseph E. Geusic, Kie Y. Ahn +2 more | 2001-06-19 |
| 6233185 | Wafer level burn-in of memory integrated circuits | Ray Beffa, Leland R. Nevill, Warren M. Farnworth, William K. Waller | 2001-05-15 |
| 6210993 | High density semiconductor package and method of fabrication | Warren M. Farnworth, Salman Akram, Alan G. Wood, Mike Brooks | 2001-04-03 |
| 6163490 | Semiconductor memory remapping | James M. Shaffer, Brent Keeth, Salman Akram | 2000-12-19 |
| 6145092 | Apparatus and method implementing repairs on a memory device | Ray Beffa, William K. Waller, Lee R. Nevill, Warren M. Farnworth | 2000-11-07 |
| 6118138 | Reduced terminal testing system | Warren M. Farnworth, Leland R. Nevill, Raymond J. Beffa | 2000-09-12 |
| 6119251 | Self-test of a memory device | Leland R. Nevill, Ray Beffa, Warren M. Farnworth | 2000-09-12 |
| 6094734 | Test arrangement for memory devices using a dynamic row for creating test data | Ray Beffa, Leland R. Nevill, Ken Waller, Warren M. Farnworth | 2000-07-25 |
| 6081463 | Semiconductor memory remapping | James M. Shaffer, Brent Keeth, Salman Akram | 2000-06-27 |
| 6058056 | Data compression circuit and method for testing memory devices | Ray Beffa, Leland R. Nevill, Neil L. Hansen | 2000-05-02 |
| 6032264 | Apparatus and method implementing repairs on a memory device | Ray Beffa, William K. Waller, Lee R. Nevill, Warren M. Farnworth | 2000-02-29 |
| 6003149 | Test method and apparatus for writing a memory array with a reduced number of cycles | Leland R. Nevill, Ray Beffa, Ken Waller, Warren M. Farnworth | 1999-12-14 |
| 6002613 | Data communication for memory | Brett Williams, Troy A. Manning | 1999-12-14 |
| 5994915 | Reduced terminal testing system | Warren M. Farnworth, Leland R. Nevill, Raymond J. Beffa | 1999-11-30 |
| 5990566 | High density semiconductor package | Warren M. Farnworth, Salman Akram, Alan G. Wood, Mike Brooks | 1999-11-23 |
| 5986948 | Data communication for memory | — | 1999-11-16 |
| 5976899 | Reduced terminal testing system | Warren M. Farnworth, Leland R. Nevill, Raymond J. Beffa | 1999-11-02 |
| 5910921 | Self-test of a memory device | Ray Beffa, William K. Waller, Warren M. Farnworth, Leland R. Nevill | 1999-06-08 |
| 5907512 | Mask write enablement for memory devices which permits selective masked enablement of plural segments | Ward Parkinson, Jeffrey S. Mailloux | 1999-05-25 |
| 5898629 | System for stressing a memory integrated circuit die | Ray Beffa, Leland R. Nevill, Warren M. Farnworth, William K. Waller | 1999-04-27 |