Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6094734 | Test arrangement for memory devices using a dynamic row for creating test data | Ray Beffa, Eugene H. Cloud, Leland R. Nevill, Warren M. Farnworth | 2000-07-25 |
| 6003149 | Test method and apparatus for writing a memory array with a reduced number of cycles | Leland R. Nevill, Ray Beffa, Eugene H. Cloud, Warren M. Farnworth | 1999-12-14 |
| 5999480 | Dynamic random-access memory having a hierarchical data path | Adrian E. Ong, Paul S. Zagar, Troy A. Manning, Brent Keeth | 1999-12-07 |
| 5901105 | Dynamic random access memory having decoding circuitry for partial memory blocks | Adrian E. Ong, Paul S. Zagar, Troy A. Manning, Brent Keeth | 1999-05-04 |