Issued Patents All Time
Showing 151–175 of 354 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8022546 | Top layers of metal for high performance IC's | Jin-Yuan Lee | 2011-09-20 |
| 8022544 | Chip structure | Chiu-Ming Chou | 2011-09-20 |
| 8022552 | Integrated circuit and method for fabricating the same | Jin-Yuan Lee | 2011-09-20 |
| 8021918 | Integrated circuit chips with fine-line metal and over-passivation metal | Jin-Yuan Lee, Chien-Kang Chou | 2011-09-20 |
| 8021921 | Method of joining chips utilizing copper pillar | Shih-Hsiung Lin | 2011-09-20 |
| 8022545 | Top layers of metal for high performance IC's | — | 2011-09-20 |
| 8018060 | Post passivation interconnection process and structures | Chiu-Ming Chou, Chien-Kang Chou | 2011-09-13 |
| 8013448 | Multiple selectable function integrated circuit module | — | 2011-09-06 |
| 8013449 | Post passivation interconnection schemes on top of the IC chips | Chiu-Ming Chou, Chien-Kang Chou | 2011-09-06 |
| 8008775 | Post passivation interconnection structures | Chiu-Ming Chou, Chien-Kang Chou | 2011-08-30 |
| 8008776 | Chip structure and process for forming the same | Jin-Yuan Lee, Ching-Cheng Huang | 2011-08-30 |
| 8004092 | Semiconductor chip with post-passivation scheme formed over passivation layer | Hsin-Jung Lo, Chien-Kang Chou, Chiu-Ming Chou, Ching-San Lin | 2011-08-23 |
| 8004083 | Integrated circuit chips with fine-line metal and over-passivation metal | Jin-Yuan Lee, Chien-Kang Chou | 2011-08-23 |
| 8004088 | Post passivation interconnection schemes on top of IC chip | Jin-Yuan Lee | 2011-08-23 |
| 7999381 | High performance sub-system design and assembly | — | 2011-08-16 |
| 7999384 | Top layers of metal for high performance IC's | — | 2011-08-16 |
| 7989954 | Integrated circuit chips with fine-line metal and over-passivation metal | Jin-Yuan Lee, Chien-Kang Chou | 2011-08-02 |
| 7990037 | Carbon nanotube circuit component structure | Chien-Kang Chou, Hsin-Jung Lo | 2011-08-02 |
| 7985653 | Semiconductor chip with coil element over passivation layer | Wen-Chieh Lee, Chien-Kang Chou, Yi-Cheng Liu, Chiu-Ming Chou, Jin-Yuan Lee | 2011-07-26 |
| 7977763 | Chip package with die and substrate | Jin-Yuan Lee, Ching-Cheng Huang | 2011-07-12 |
| 7973629 | Method for making high-performance RF integrated circuits | Jin-Yuan Lee | 2011-07-05 |
| 7973401 | Stacked chip package with redistribution lines | Shih-Hsiung Lin, Hsin-Jung Lo, Ying-Chih Chen, Chiu-Ming Chou | 2011-07-05 |
| 7969006 | Integrated circuit chips with fine-line metal and over-passivation metal | Jin-Yuan Lee, Chien-Kang Chou | 2011-06-28 |
| 7964973 | Chip structure | Chiu-Ming Chou, Chien-Kang Chou, Hsin-Jung Lo | 2011-06-21 |
| 7960842 | Structure of high performance combo chip and processing method | Jin-Yuan Lee | 2011-06-14 |