ML

Mou-Shiung Lin

ME Megica: 237 patents #1 of 32Top 4%
IC Icometrue Company: 54 patents #1 of 5Top 20%
QU Qualcomm: 14 patents #1,516 of 12,104Top 15%
MA Megit Acquisition: 9 patents #1 of 12Top 9%
TSMC: 4 patents #4,745 of 12,232Top 40%
UN Unknown: 2 patents #12,644 of 83,584Top 20%
ET Etron Technology: 1 patents #75 of 145Top 55%
UM United Microelectronics: 1 patents #2,686 of 4,560Top 60%
Disney: 1 patents #3,944 of 6,686Top 60%
ST Stembios Technologies: 1 patents #2 of 5Top 40%
Overall (All Time): #860 of 4,157,543Top 1%
354
Patents All Time

Issued Patents All Time

Showing 126–150 of 354 patents

Patent #TitleCo-InventorsDate
8198729 Connection between a semiconductor chip and a circuit component with a large contact area Chiu-Ming Chou, Chien-Kang Chou 2012-06-12
8193555 Image and light sensor chip packages Jin-Yuan Lee 2012-06-05
8187965 Wirebond pad for semiconductor chip or wafer Michael Chen, Chien-Kang Chou, Mark Chou 2012-05-29
8188603 Post passivation interconnection schemes on top of IC chip Jin-Yuan Lee 2012-05-29
8178435 High performance system-on-chip inductor using post passivation process 2012-05-15
8168527 Semiconductor chip and method for fabricating the same Chiu-Ming Chou 2012-05-01
8164171 System-in packages Jin-Yuan Lee 2012-04-24
8159074 Chip structure Chiu-Ming Chou, Chien-Kang Chou, Hsin-Jung Lo 2012-04-17
8159070 Chip packages Jin-Yuan Lee 2012-04-17
8158508 Structure and manufacturing method of a chip scale package Ming-Ta Lei, Chuen-Jye Lin 2012-04-17
8148822 Bonding pad on IC substrate and method for making the same Hsin-Jung Lo, Chiu-Ming Chou, Chien-Kang Chou, Ke-Hung Chen 2012-04-03
8148806 Multiple chips bonded to packaging structure with low noise and multiple selectable functions Bryan Peng 2012-04-03
8138079 Method of wire bonding over active area of a semiconductor circuit Jin-Yuan Lee, Ying-Chih Chen 2012-03-20
8129265 High performance system-on-chip discrete components using post passivation process 2012-03-06
8124446 Structure of high performance combo chip and processing method Jin-Yuan Lee 2012-02-28
8120181 Post passivation interconnection process and structures Chiu-Ming Chou, Chien-Kang Chou 2012-02-21
8119446 Integrated chip package structure using metal substrate and method of manufacturing the same Jin-Yuan Lee, Ching-Cheng Huang 2012-02-21
8107311 Software programmable multiple function integrated circuit module 2012-01-31
8089155 High performance system-on-chip discrete components using post passivation process 2012-01-03
8072070 Low fabrication cost, fine pitch and high reliability solder bump Jin-Yuan Lee, Ching-Cheng Huang 2011-12-06
8067837 Metallization structure over passivation layer for IC chip 2011-11-29
8044475 Chip package Shih-Hsiung Lin, Hsin-Jung Lo 2011-10-25
8035227 Top layers of metal for high performance IC's Jin-Yuan Lee 2011-10-11
8030775 Wirebond over post passivation thick metal 2011-10-04
8026588 Method of wire bonding over active area of a semiconductor circuit Jin-Yuan Lee, Ying-Chih Chen 2011-09-27