Issued Patents All Time
Showing 76–100 of 354 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8692374 | Carbon nanotube circuit component structure | Chien-Kang Chou, Hsin-Jung Lo | 2014-04-08 |
| 8618580 | Integrated circuit chips with fine-line metal and over-passivation metal | Jin-Yuan Lee, Chien-Kang Chou | 2013-12-31 |
| 8581404 | Structure of gold bumps and gold conductors on one IC die and methods of manufacturing the structures | Chiu-Ming Chou | 2013-11-12 |
| 8558383 | Post passivation structure for a semiconductor device and packaging process for same | Chien-Kang Chou, Ke-Hung Chen | 2013-10-15 |
| 8552559 | Very thick metal interconnection scheme in IC chips | Chiu-Ming Chou, Chien-Kang Chou | 2013-10-08 |
| 8546947 | Chip structure and process for forming the same | Jin-Yuan Lee, Ching-Cheng Huang | 2013-10-01 |
| 8535976 | Method for fabricating chip package with die and substrate | Jin-Yuan Lee, Ching-Cheng Huang | 2013-09-17 |
| 8531038 | Top layers of metal for high performance IC's | — | 2013-09-10 |
| 8519552 | Chip structure | Chiu-Ming Chou | 2013-08-27 |
| 8503186 | System-in packages | Jin-Yuan Lee | 2013-08-06 |
| 8492900 | Post passivation interconnection schemes on top of IC chip | Jin-Yuan Lee | 2013-07-23 |
| 8492870 | Semiconductor package with interconnect layers | Jin-Yuan Lee, Ching-Cheng Huang | 2013-07-23 |
| 8487400 | High performance system-on-chip using post passivation process | — | 2013-07-16 |
| 8482127 | Post passivation interconnection schemes on top of IC chip | Jin-Yuan Lee | 2013-07-09 |
| 8471389 | Multiple selectable function integrated circuit module | — | 2013-06-25 |
| 8471388 | Integrated circuit and method for fabricating the same | Jin-Yuan Lee | 2013-06-25 |
| 8471384 | Top layers of metal for high performance IC's | — | 2013-06-25 |
| 8471361 | Integrated chip package structure using organic substrate and method of manufacturing the same | Jin-Yuan Lee, Ching-Cheng Huang | 2013-06-25 |
| 8461686 | Post passivation interconnection schemes on top of IC chip | Jin-Yuan Lee | 2013-06-11 |
| 8456856 | Integrated circuit chip using top post-passivation technology and bottom structure technology | Jin-Yuan Lee, Hsin-Jung Lo, Ping-Jung Yang, Te-Sheng Liu | 2013-06-04 |
| 8456013 | Post passivation interconnection schemes on top of the IC chips | — | 2013-06-04 |
| 8440272 | Method for forming post passivation Au layer with clean surface | Shih-Hsiung Lin | 2013-05-14 |
| 8436449 | Chip package and method for fabricating the same | — | 2013-05-07 |
| 8435883 | Post passivation interconnection schemes on top of IC chips | Jin-Yuan Lee | 2013-05-07 |
| 8426982 | Structure and manufacturing method of chip scale package | Jin-Yuan Lee, Ching-Cheng Huang | 2013-04-23 |