Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12433081 | Display device, light-emitting diode substrate, and fabrication method of display device | Yang-En Wu | 2025-09-30 |
| 12426420 | Light-emitting diode element and method for manufacturing display apparatus | Yang-En Wu | 2025-09-23 |
| 12412873 | Display panel having vertical light emitting device and flip chip light emitting device | Yang-En Wu, Jenn-Jia Su, June-Woo Lee | 2025-09-09 |
| 11955506 | Fabrication method of display device | Yang-En Wu | 2024-04-09 |
| 11948928 | Display apparatus and manufacturing method thereof | Yang-En Wu | 2024-04-02 |
| 8890336 | Cylindrical bonding structure and method of manufacture | Jin-Yuan Lee, Chien-Kang Chou, Hsi-Shan Kuo | 2014-11-18 |
| 8633908 | Method of fabricating electronic apparatus | Yi-Shan Chang, Juin-Ming Wu, Ying Chen, Sheng-Hung Wang, Wen-Hau Lee +1 more | 2014-01-21 |
| 8461679 | Method for fabricating circuit component | Jin-Yuan Lee, Chien-Kang Chou, Hsi-Shan Kuo | 2013-06-11 |
| 8440272 | Method for forming post passivation Au layer with clean surface | Mou-Shiung Lin | 2013-05-14 |
| 8426958 | Stacked chip package with redistribution lines | Mou-Shiung Lin, Hsin-Jung Lo, Ying-Chih Chen, Chiu-Ming Chou | 2013-04-23 |
| 8421222 | Chip package having a chip combined with a substrate via a copper pillar | Mou-Shiung Lin | 2013-04-16 |
| 8368193 | Chip package | Mou-Shiung Lin, Hsin-Jung Lo | 2013-02-05 |
| 8344524 | Wire bonding method for preventing polymer cracking | Chiu-Ming Chou, Mou-Shiung Lin, Hsin-Jung Lo | 2013-01-01 |
| 8294279 | Chip package with dam bar restricting flow of underfill | Ke-Hung Chen, Mou-Shiung Lin | 2012-10-23 |
| 8232192 | Process of bonding circuitry components | Mou-Shiung Lin, Hsin-Jung Lo | 2012-07-31 |
| 8044475 | Chip package | Mou-Shiung Lin, Hsin-Jung Lo | 2011-10-25 |
| 8021921 | Method of joining chips utilizing copper pillar | Mou-Shiung Lin | 2011-09-20 |
| 7973401 | Stacked chip package with redistribution lines | Mou-Shiung Lin, Hsin-Jung Lo, Ying-Chih Chen, Chiu-Ming Chou | 2011-07-05 |
| 7960270 | Method for fabricating circuit component | Jin-Yuan Lee, Chien-Kang Chou, Hsi-Shan Kuo | 2011-06-14 |
| 7960272 | Method for fabricating thermal compliant semiconductor chip wiring structure for chip scale packaging | Jin-Yuan Lee | 2011-06-14 |
| 7508059 | Stacked chip package with redistribution lines | Mou-Shiung Lin, Hsin-Jung Lo, Ying-Chih Chen, Chiu-Ming Chou | 2009-03-24 |
| 7495304 | Chip package | Mou-Shiung Lin, Hsin-Jung Lo | 2009-02-24 |
| 7382005 | Circuit component with bump formed over chip | Mou-Shiung Lin | 2008-06-03 |
| 7242099 | Chip package with multiple chips connected by bumps | Mou-Shiung Lin | 2007-07-10 |
| 7208834 | Bonding structure with pillar and cap | Jin-Yuan Lee, Chien-Kang Chou, Hsi-Shan Kuo | 2007-04-24 |