JH

John Hoang

Lam Research: 10 patents #289 of 2,128Top 15%
AS Aehr Test Systems: 5 patents #20 of 36Top 60%
Overall (All Time): #212,947 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12365373 Undercarriage inspection assemblies and systems Mabby Nicholas Amouie, Evan Thomas Gebhardt, Colin Usher, Alex Samoylov, Sean Thomas +3 more 2025-07-22
12348880 Rail-side inspection assemblies and systems Mabby Nicholas Amouie, Evan Thomas Gebhardt, Colin Usher, Alex Samoylov, Sean Thomas +3 more 2025-07-01
12201740 Automated robotic system and method for sanitization and disinfection Sherylinn Hoang 2025-01-21
12080592 Film stack simplification for high aspect ratio patterning and vertical scaling Hui-Jung Wu, Bart J. van Schravendijk, Mark Kawaguchi, Gereng Gunawan, Jay E. Uglow +11 more 2024-09-03
11832533 Conformal damage-free encapsulation of chalcogenide materials James S. Sims, Andrew John McKerrow, Meihua Shen, Thorsten Lill, Shane Tang +4 more 2023-11-28
11792987 Self-aligned vertical integration of three-terminal memory devices Thorsten Lill, Meihua Shen, Hui-Jung Wu, Gereng Gunawan, Yang Pan 2023-10-17
11723998 Automated robotic system and method for sanitization and disinfection Sherylinn Hoang 2023-08-15
11511008 Automated robotic system and method for sanitization and disinfection Sherylinn Hoang 2022-11-29
11239420 Conformal damage-free encapsulation of chalcogenide materials James S. Sims, Andrew John McKerrow, Meihua Shen, Thorsten Lill, Shane Tang +4 more 2022-02-01
10784086 Cobalt etch back Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill 2020-09-22
10199235 Liner and barrier applications for subtractive metal integration Hui-Jung Wu, Thomas Knisley, Nagraj Shankar, Meihua Shen, Prithu Sharma 2019-02-05
9899234 Liner and barrier applications for subtractive metal integration Hui-Jung Wu, Thomas Knisley, Nagraj Shankar, Meihua Shen, Prithu Sharma 2018-02-20
9870899 Cobalt etch back Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill 2018-01-16
9589853 Method of planarizing an upper surface of a semiconductor substrate in a plasma etch chamber Monica Titus, Gowri Kamarthy, Harmeet Singh, Yoshie Kimura, Meihua Shen +2 more 2017-03-07
9570320 Method to etch copper barrier film Meihua Shen, Ji Zhu, Shuogang Huang, Baosuo Zhou, Prithu Sharma +1 more 2017-02-14
7928754 Wafer level burn-in and electrical test system and method Donald P. Richmond, II, Jerzy Lobacz 2011-04-19
7619428 Wafer level burn-in and electrical test system and method Donald P. Richmond, II, Jerzy Lobacz 2009-11-17
6682945 Wafer level burn-in and electrical test system and method Donald P. Richmond, II, Jerzy Lobacz 2004-01-27
6562636 Wafer level burn-in and electrical test system and method Donald P. Richmond, II, Jerry Lobacz 2003-05-13
5429510 High-density interconnect technique William D. Barraclough, Mikhail A. Alperin, Jeffrey A. Brehm, Patrick M. Shepherd, James F. Tomic 1995-07-04