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Jaydeep Sinha — 41 Patents

Kla-Tencor: 35 patents #36 of 2,049Top 2%

ADAde: 5 patents #8 of 59Top 15%

Livermore, CA: #51 of 2,185 inventorsTop 3%

California: #11,075 of 386,348 inventorsTop 3%

Overall (All Time): #75,001 of 4,157,543Top 2%

41 Patents All Time

Jaydeep Sinha has been granted 41 US patents while listed as an inventor at Kla-Tencor. The first was granted in 2003 and the most recent in September 2023. Jaydeep Sinha ranks #75,001 of 4,157,543 US inventors in our database (top 1.8%). Patent records list Jaydeep Sinha in Livermore, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–25 of 41 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
11761880	Process-induced distortion prediction and feedforward and feedback correction of overlay errors	Pradeep Vukkadala, Haiguang Chen, Sathish Veeraraghavan	2023-09-19	$220,227,000
10788759	Prediction based chucking and lithography control optimization	Bin-Ming Benjamin Tsai, Oreste Donzella, Pradeep Vukkadala	2020-09-29
10576603	Patterned wafer geometry measurements for semiconductor process controls	Pradeep Vukkadala	2020-03-03
10401279	Process-induced distortion prediction and feedforward and feedback correction of overlay errors	Pradeep Vukkadala, Haiguang Chen, Sathish Veeraraghavan	2019-09-03
10379061	Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry tool	Haiguang Chen, Sergey Kamensky, Sathish Veeraraghavan, Pradeep Vukkadala	2019-08-13
10352691	Systems and methods for wafer structure uniformity monitoring using interferometry wafer geometry tool	Haiguang Chen, Shouhong Tang, Sergey Kamensky	2019-07-16
10330608	Systems and methods for wafer surface feature detection, classification and quantification with wafer geometry metrology tools	Haiguang Chen, Sergey Kamensky	2019-06-25
10249523	Overlay and semiconductor process control using a wafer geometry metric	Pradeep Vukkadala, Sathish Veeraraghavan	2019-04-02
10036964	Prediction based chucking and lithography control optimization	Bin-Ming Benjamin Tsai, Oreste Donzella, Pradeep Vukkadala	2018-07-31
10025894	System and method to emulate finite element model based prediction of in-plane distortions due to semiconductor wafer chucking	Pradeep Vukkadala, Sathish Veeraraghavan, Haiguang Chen, Michael D. Kirk	2018-07-17
9865047	Systems and methods for effective pattern wafer surface measurement and analysis using interferometry tool	Haiguang Chen, Enrique Chavez, Sathish Veeraraghavan	2018-01-09
9779202	Process-induced asymmetry detection, quantification, and control using patterned wafer geometry measurements	Pradeep Vukkadala, Jong Hoon Kim	2017-10-03
9707660	Predictive wafer modeling based focus error prediction using correlations of wafers	Pradeep Vukkadala, Wei Chang, Krishna Rao	2017-07-18
9702829	Systems and methods for wafer surface feature detection and quantification	Haiguang Chen, Sergey Kamensky, Enrique Chavez, Shouhong Tang, Mark Plemmons	2017-07-11
9646379	Detection of selected defects in relatively noisy inspection data	Haiguang Chen, Michael D. Kirk, Stephen Biellak	2017-05-09
9632038	Hybrid phase unwrapping systems and methods for patterned wafer measurement	Haiguang Chen	2017-04-25
9588441	Method and device for using substrate geometry to determine optimum substrate analysis sampling	Craig MacNaughton	2017-03-07
9558545	Predicting and controlling critical dimension issues and pattern defectivity in wafers using interferometry	Pradeep Vukkadala, Sathish Veeraraghavan, Soham Dey	2017-01-31
9546862	Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry tool	Haiguang Chen, Sergey Kamensky, Sathish Veeraraghavan, Pradeep Vukkadala	2017-01-17
9513565	Using wafer geometry to improve scanner correction effectiveness for overlay control	Craig MacNaughton, Sathish Veeraraghavan, Pradeep Vukkadala, Amir Azordegan	2016-12-06
9430593	System and method to emulate finite element model based prediction of in-plane distortions due to semiconductor wafer chucking	Pradeep Vukkadala, Sathish Veeraraghavan, Haiguang Chen, Michael D. Kirk	2016-08-30
9373165	Enhanced patterned wafer geometry measurements based design improvements for optimal integrated chip fabrication performance	Amir Azordegan, Pradeep Vukkadala, Craig MacNaughton	2016-06-21
9354526	Overlay and semiconductor process control using a wafer geometry metric	Pradeep Vukkadala, Sathish Veeraraghavan	2016-05-31
9355440	Detection of selected defects in relatively noisy inspection data	Haiguang Chen, Michael D. Kirk, Stephen Biellak	2016-05-31
9177370	Systems and methods of advanced site-based nanotopography for wafer surface metrology	Haiguang Chen, Sergey Kamensky, Pradeep Vukkadala	2015-11-03