Issued Patents All Time
Showing 101–109 of 109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6319853 | Method of manufacturing a semiconductor device using a minute resist pattern, and a semiconductor device manufactured thereby | Takeo Ishibashi, Toshiyuki Toyoshima, Keiichi Katayama | 2001-11-20 |
| 6320220 | Quantum tunneling effect device and semiconductor composite substrate | Hiroshi Watanabe, Akira Toriumi, Tomoharu Tanaka, Toru Tanzawa | 2001-11-20 |
| 6288155 | Thermal stabilizer and thermally stabilized halogen-containing resin composition | Yasuyoshi Miyachi, Yasunori Atarashi, Takeo Tanaka | 2001-09-11 |
| 6180320 | Method of manufacturing a semiconductor device having a fine pattern, and semiconductor device manufactured thereby | Takayuki Saito, Takeo Ishibashi, Toshiyuki Toyoshima, Kanji Sugino, Tadashi Miyagi | 2001-01-30 |
| 6147148 | Thermal-aging resistant thermoplastic resin composition comprising a dibasic acid erythritol ester, and resin molded article obtained therefrom | Hiroyuki Tanaka | 2000-11-14 |
| 6111288 | Quantum tunneling effect device and semiconductor composite substrate | Hiroshi Watanabe, Akira Toriumi, Tomoharu Tanaka, Toru Tanzawa | 2000-08-29 |
| 6060403 | Method of manufacturing semiconductor device | Masahiro Koike, Kouichi Muraoka, Hideki Satake | 2000-05-09 |
| 5851842 | Measurement system and measurement method | Ryota Katsumata, Nobuo Hayasaka, Hideshi Miyajima, Iwao Higashikawa, Masaki Hotta | 1998-12-22 |
| 5586006 | Multi-chip module having a multi-layer circuit board with insulating layers and wiring conductors stacked together | Kiyotaka Seyama, Shunichi Kikuchi, Makoto Sumiyoshi, Minoru Hirano, Hitoshi Nori | 1996-12-17 |