Issued Patents All Time
Showing 26–36 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6458713 | Method for manufacturing semiconductor device | Nobuhide Yamada, Rempei Nakata, Motonobu Kawai | 2002-10-01 |
| 6436849 | Method for manufacturing semiconductor device having low dielectric constant insulating film, wafer processing equipment and wafer storing box used in this method | Masahiko Hasunuma, Hisashi Kaneko, Rempei Nakata | 2002-08-20 |
| 6344420 | Plasma processing method and plasma processing apparatus | Keiji Fujita | 2002-02-05 |
| 6164295 | CVD apparatus with high throughput and cleaning method therefor | Akio Ui, Naruhiko Kaji, Nobuo Hayasaka | 2000-12-26 |
| 6153509 | Method of manufacturing a semiconductor device | Kei Watanabe, Yukio Nishiyama, Naruhiko Kaji | 2000-11-28 |
| 6051508 | Manufacturing method of semiconductor device | Tamao Takase, Tadashi Matsuno | 2000-04-18 |
| 5885352 | Vapor phase processing apparatus | — | 1999-03-23 |
| 5851842 | Measurement system and measurement method | Ryota Katsumata, Nobuo Hayasaka, Naoki Yasuda, Iwao Higashikawa, Masaki Hotta | 1998-12-22 |
| 5731634 | Semiconductor device having a metal film formed in a groove in an insulating film | Mie Matsuo, Haruo Okano, Nobuo Hayasaka, Kyoichi Suguro, Jun Wada | 1998-03-24 |
| 5561082 | Method for forming an electrode and/or wiring layer by reducing copper oxide or silver oxide | Mie Matsuo, Haruo Okano, Nobuo Hayasaka, Kyoichi Suguro, Jun Wada | 1996-10-01 |
| 5424246 | Method of manufacturing semiconductor metal wiring layer by reduction of metal oxide | Mie Matsuo, Haruo Okano, Nobuo Hayasaka, Kyoichi Suguro, Jun Wada | 1995-06-13 |