Issued Patents All Time
Showing 1–25 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12310262 | Phase change memory with encapsulated phase change element | Dexin Kong, Kangguo Cheng, Juntao Li | 2025-05-20 |
| 12301168 | Frequency control in a multi-mode VCO | Bodhisatwa Sadhu, Herschel A. Ainspan, Armagan Dascurcu, Gary A. Kurtzman | 2025-05-13 |
| 11894303 | Circuit wiring techniques for stacked transistor structures | Dongbing Shao, Chen Zhang, Tenko Yamashita | 2024-02-06 |
| 11877524 | Nanotip filament confinement | Juntao Li, Kangguo Cheng, Dexin Kong | 2024-01-16 |
| 11812675 | Filament confinement in resistive random access memory | Juntao Li, Kangguo Cheng, Dexin Kong | 2023-11-07 |
| 11749529 | Self-aligned double patterning with spacer-merge region | Rasit Onur Topaloglu, Kafai Lai, Dongbing Shao | 2023-09-05 |
| 11665987 | Integrated switch using stacked phase change materials | Juntao Li, Kangguo Cheng, Dexin Kong | 2023-05-30 |
| 11362093 | Co-integration of non-volatile memory on gate-all-around field effect transistor | Zhenxing Bi, Dexin Kong, Kangguo Cheng | 2022-06-14 |
| 11302532 | Self-aligned double patterning with spacer-merge region | Rasit Onur Topaloglu, Kafai Lai, Dongbing Shao | 2022-04-12 |
| 11270768 | Failure prevention of chip power network | Kangguo Cheng, Dexin Kong, Juntao Li | 2022-03-08 |
| 11251267 | Vertical transistors with multiple gate lengths | Zhenxing Bi, Kangguo Cheng, Peng Xu | 2022-02-15 |
| 11165248 | Air gap metal tip electrostatic discharge protection | Qianwen Chen, Yang Liu, Dongbing Shao | 2021-11-02 |
| 11163932 | Semiconductor process modeling to enable skip via in place and route flow | Dongbing Shao, Lawrence A. Clevenger | 2021-11-02 |
| 11133670 | Air gap metal tip electrostatic discharge protection | Qianwen Chen, Yang Liu, Dongbing Shao | 2021-09-28 |
| 11121318 | Tunable forming voltage for RRAM device | Dexin Kong, Kangguo Cheng, Juntao Li | 2021-09-14 |
| 11075200 | Integrated device with vertical field-effect transistors and hybrid channels | Zhenxing Bi, Kangguo Cheng, Dexin Kong | 2021-07-27 |
| 11036126 | Semiconductor fabrication design rule loophole checking for design for manufacturability optimization | Chieh-Yu Lin, Dongbing Shao, Kehan Tian | 2021-06-15 |
| 11024711 | Nanosheet FET bottom isolation | Ruqiang Bao, Zhenxing Bi, Kangguo Cheng | 2021-06-01 |
| 10985236 | Tunable on-chip nanosheet resistor | Zhenxing Bi, Kangguo Cheng, Wei Wang | 2021-04-20 |
| 10950545 | Circuit wiring techniques for stacked transistor structures | Dongbing Shao, Chen Zhang, Tenko Yamashita | 2021-03-16 |
| 10936782 | Semiconductor process modeling to enable skip via in place and route flow | Dongbing Shao, Lawrence A. Clevenger | 2021-03-02 |
| 10930734 | Nanosheet FET bottom isolation | Ruqiang Bao, Zhenxing Bi, Kangguo Cheng | 2021-02-23 |
| 10915690 | Via design optimization to improve via resistance | Dongbing Shao, Yongan Xu, Shyng-Tsong Chen | 2021-02-09 |
| 10831973 | Semiconductor process modeling to enable skip via in place and route flow | Dongbing Shao, Lawrence A. Clevenger | 2020-11-10 |
| 10831976 | Predicting local layout effects in circuit design patterns | Jing Sha, Dongbing Shao, Yufei Wu | 2020-11-10 |