Issued Patents All Time
Showing 25 most recent of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10096473 | Formation of a layer on a semiconductor substrate | Maxim Kelman, Zhongyuan Jia, Robert Ditizio | 2018-10-09 |
| 9869031 | High-productivity porous semiconductor manufacturing equipment | George D. Kamian, Subramanian Tamilmani, Mehrdad M. Moslehi, Karl-Josef Kramer, Takao Yonehara | 2018-01-16 |
| 9455360 | Method of fabricating a metal wrap through solar cell | Ashish Asthana, Tirunelveli S. Ravi, Kramadhati V. Ravi | 2016-09-27 |
| 9401276 | Apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates | Mehrdad M. Moslehi, Karl-Josef Kramer, David Xuan-Qi Wang, Pawan Kapur, George D. Kamian +2 more | 2016-07-26 |
| 9093323 | Methods for selectively coating three-dimensional features on a substrate | David Xuan-Qi Wang, Mehrdad M. Moslehi | 2015-07-28 |
| 9053957 | Structure and method for creating a reusable template for detachable thin film substrates | Suketu Arun Parikh, David Dutton, Pawan Kapur, Mehrdad M. Moslehi, Karl-Josef Kramer +2 more | 2015-06-09 |
| 8999058 | High-productivity porous semiconductor manufacturing equipment | George D. Kamian, Subbu Tamilmani, Mehrdad M. Moslehi, Karl-Josef Kramer, Takao Yonehara | 2015-04-07 |
| 8926803 | Porous silicon electro-etching system and method | Doug Crafts, Mehrdad M. Moslehi, Subramanian Tamilmani, Joe Kramer, George D. Kamian | 2015-01-06 |
| 8883552 | MWT architecture for thin SI solar cells | Ashish Asthana, Tirunelveli S. Ravi, Kramadhati V. Ravi | 2014-11-11 |
| 8512581 | Methods for liquid transfer coating of three-dimensional substrates | David Xuan-Qi Wang, Mehrdad M. Moslehi | 2013-08-20 |
| 8445314 | Method of creating reusable template for detachable thin film substrate | Suketu Arun Parikh, David Dutton, Pawan Kapur, Mehrdad M. Moslehi, Joe Kramer +2 more | 2013-05-21 |
| 8241940 | Double-sided reusable template for fabrication of semiconductor substrates for photovoltaic cell and microelectronics device manufacturing | Mehrdad M. Moslehi, Karl-Josef Kramer, David Xuan-Qi Wang, Pawan Kapur, George D. Kamian +2 more | 2012-08-14 |
| 7786376 | High efficiency solar cells and manufacturing methods | Mehrdad M. Moslehi | 2010-08-31 |
| 7713881 | Process sequence for doped silicon fill of deep trenches | Ajit Paranjpe | 2010-05-11 |
| 7446366 | Process sequence for doped silicon fill of deep trenches | Ajit Paranjpe | 2008-11-04 |
| 7109097 | Process sequence for doped silicon fill of deep trenches | Ajit Paranjpe | 2006-09-19 |
| 6962883 | Integrated circuit insulator and method | Girish Dixit, Srikanth Krishnan | 2005-11-08 |
| 6764952 | Systems and methods to retard copper diffusion and improve film adhesion for a dielectric barrier on copper | Jengyi Yu, Ka Shun Wong, Sanjeev Kumar Jain, Haiying Fu, Atul Gupta +1 more | 2004-07-20 |
| 6424040 | Integration of fluorinated dielectrics in multi-level metallizations | Changming Jin, Wei-Yung Hsu, Guoqiang Xing | 2002-07-23 |
| 6417092 | Low dielectric constant etch stop films | Sanjeev Kumar Jain, Gerrit J Kooi, M. Ziaul Karim, Kenneth P. MacWilliams | 2002-07-09 |
| 6313010 | Integrated circuit insulator and method | Amitava Chatterjee, Ih-Chin Chen | 2001-11-06 |
| 6306725 | In-situ liner for isolation trench side walls and method | Amitava Chatterjee | 2001-10-23 |
| 6297125 | Air-bridge integration scheme for reducing interconnect delay | Amitava Chatterjee, Girish Dixit | 2001-10-02 |
| 6268297 | Self-planarizing low-temperature doped-silicate-glass process capable of gap-filling narrow spaces | Gregory B. Shinn, Girish Dixit | 2001-07-31 |
| 6214719 | Method of implementing air-gap technology for low capacitance ILD in the damascene scheme | — | 2001-04-10 |