Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12266415 | Reliable electronic fuse based storage using error correction coding | Kevin W. Gorman, John R. Goss | 2025-04-01 |
| 11295829 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Krishnendu Mondal, Kiran K. Narayan, Michael R. Ouellette +1 more | 2022-04-05 |
| 10971243 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Krishnendu Mondal, Kiran K. Narayan, Michael R. Ouellette +1 more | 2021-04-06 |
| 10692584 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Krishnendu Mondal, Kiran K. Narayan, Michael R. Ouellette +1 more | 2020-06-23 |
| 10553302 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Krishnendu Mondal, Kiran K. Narayan, Michael R. Ouellette +1 more | 2020-02-04 |
| 10295592 | Pre-test power-optimized bin reassignment following selective voltage binning | Igor Arsovski, Jeanne P. Bickford, Susan K. Lichtensteiger, Robert McMahon, Troy J. Perry +2 more | 2019-05-21 |
| 9881694 | Built-in-self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Krishnendu Mondal, Kiran K. Narayan, Michael R. Ouellette +1 more | 2018-01-30 |
| 9759767 | Pre-test power-optimized bin reassignment following selective voltage binning | Igor Arsovski, Jeanne P. Bickford, Susan K. Lichtensteiger, Robert McMahon, Troy J. Perry +2 more | 2017-09-12 |
| 9760673 | Application specific integrated circuit (ASIC) test screens and selection of such screens | Eric D. Hunt-Schroeder, John R. Goss, Igor Arsovski | 2017-09-12 |
| 7904839 | System and method for controlling access to addressable integrated circuits | John R. Goss, Robert McMahon | 2011-03-08 |
| 7831936 | Structure for a system for controlling access to addressable integrated circuits | John R. Goss, Robert McMahon | 2010-11-09 |