JD

Jonathan James DeMent

IBM: 32 patents #3,111 of 70,183Top 5%
Overall (All Time): #114,036 of 4,157,543Top 3%
32
Patents All Time

Issued Patents All Time

Showing 25 most recent of 32 patents

Patent #TitleCo-InventorsDate
8244979 System and method for cache-locking mechanism using translation table attributes for replacement class ID determination Adam P. Burns, Jason N. Dale, Gavin B. Meil 2012-08-14
8230495 Method for security in electronically fused encryption keys Robert W. Berry, Jr., John Liberty 2012-07-24
8099579 System and method for cache-locking mechanism using segment table attributes for replacement class ID determination Adam P. Burns, Jason N. Dale, Gavin B. Meil 2012-01-17
8046574 Secure boot across a plurality of processors Jason N. Dale, Clark M. O'Niell, Christopher J. Spandikow 2011-10-25
8046573 Masking a hardware boot sequence Jason N. Dale, Clark M. O'Niell, Steven L. Roberts 2011-10-25
8037293 Selecting a random processor to boot on a multiprocessor system Jason N. Dale, Clark M. O'Niell, Christopher J. Spandikow 2011-10-11
8028151 Performance of an in-order processor by no longer requiring a uniform completion point across different execution pipelines Christopher M. Abernathy, Ronald P. Hall, Albert J. Van Norstrand, Jr. 2011-09-27
7917347 Generating a worst case current waveform for testing of integrated circuit devices Makoto Aikawa, Sang Hoo Dhong, Brian Flachs, Gilles Gervais, Iwao Takiguchi +1 more 2011-03-29
7913070 Time-of-life counter for handling instruction flushes from a queue Christopher M. Abernathy, Ronald P. Hall, Robert Alan Philhower, David Shippy 2011-03-22
7877550 Bus controller initiated write-through mechanism with hardware automatically generated clean command Kerey Michelle Tassin, Thuong Quang Truong 2011-01-25
7831808 Queue design system supporting dependency checking and issue for SIMD instructions within a general purpose processor Christopher M. Abernathy, Ronald P. Hall, David Shippy 2010-11-09
7779273 Booting a multiprocessor device based on selection of encryption keys to be provided to processors Jason N. Dale, Clark M. O'Niell, Christopher J. Spandikow 2010-08-17
7774616 Masking a boot sequence by providing a dummy processor Jason N. Dale, Clark M. O'Niell, Steven L. Roberts 2010-08-10
7774617 Masking a boot sequence by providing a dummy processor Jason N. Dale, Clark M. O'Niell, Steven L. Roberts 2010-08-10
7739573 Voltage identifier sorting Sang Hoo Dhong, Gilles Gervais, Alain Loiseau, Kirk D. Peterson, John L. Sinchak 2010-06-15
7711903 Preloading translation buffers Michael Norman Day, Charles Johns 2010-05-04
7681056 Dynamic power management in a processor design Christopher M. Abernathy, Ronald P. Hall, Robert Alan Philhower, David Shippy 2010-03-16
7594104 System and method for masking a hardware boot sequence Jason N. Dale, Clark M. O'Niell, Steven L. Roberts 2009-09-22
7519780 System and method for reducing store latency in symmetrical multiprocessor systems Roy Moonseuk Kim, Alvan W. Ng, Kevin C. Stelzer, Thuong Quang Truong 2009-04-14
7516275 Pseudo-LRU virtual counter for a locking cache Ronald P. Hall, Brian Patrick Hanley, Kevin C. Stelzer 2009-04-07
7490224 Time-of-life counter design for handling instruction flushes from a queue Christopher M. Abernathy, Ronald P. Hall, Robert Alan Philhower, David Shippy 2009-02-10
7475232 Performance of an in-order processor by no longer requiring a uniform completion point across different execution pipelines Christopher M. Abernathy, Ronald P. Hall, Albert J. Van Norstrand, Jr. 2009-01-06
7472229 Bus controller initiated write-through mechanism Kerey Michelle Tassin, Thuong Quang Truong 2008-12-30
7447602 System and method for sorting processors based on thermal design point Douglas H. Bradley, Sang Hoo Dhong, Brian Flachs, Gilles Gervais, Yoichi Nishino 2008-11-04
7401242 Dynamic power management in a processor design Christopher M. Abernathy, Ronald P. Hall, Robert Alan Philhower, David Shippy 2008-07-15