Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7519780 | System and method for reducing store latency in symmetrical multiprocessor systems | Jonathan James DeMent, Roy Moonseuk Kim, Alvan W. Ng, Thuong Quang Truong | 2009-04-14 |
| 7516275 | Pseudo-LRU virtual counter for a locking cache | Jonathan James DeMent, Ronald P. Hall, Brian Patrick Hanley | 2009-04-07 |
| 7069390 | Implementation of a pseudo-LRU algorithm in a partitioned cache | Wen-Tzer T. Chen, Peichun Peter Liu | 2006-06-27 |