DS

Daniel A. Steckert

AM AMD: 3 patents #3,141 of 9,279Top 35%
Micron: 3 patents #3,077 of 6,345Top 50%
Overall (All Time): #855,880 of 4,157,543Top 25%
6
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8673787 Method to reduce charge buildup during high aspect ratio contact etch Gurtej S. Sandhu, Max Hineman, Jingyi Bai, Shane J. Trapp, Tony Schrock 2014-03-18
7985692 Method to reduce charge buildup during high aspect ratio contact etch Gurtej S. Sandhu, Max Hineman, Jingyi Bai, Shane J. Trapp, Tony Schrock 2011-07-26
7344975 Method to reduce charge buildup during high aspect ratio contact etch Gurtej S. Sandhu, Max Hineman, Jingyi Bai, Shane J. Trapp, Tony Schrock 2008-03-18
6107172 Controlled linewidth reduction during gate pattern formation using an SiON BARC Chih-Yuh Yang, Scott A. Bell 2000-08-22
5965461 Controlled linewidth reduction during gate pattern formation using a spin-on barc Chih-Yuh Yang, Scott A. Bell 1999-10-12
5879975 Heat treating nitrogen implanted gate electrode layer for improved gate electrode etch profile Olov Karlsson, Effiong Ibok, Dong-Hyuk Ju, Scott A. Bell, Robert B. Ogle 1999-03-09