Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12381751 | Direct memory access (DMA) engine with network interface capabilities | Sujoy Sen, Durgesh Srivastava, Thomas E. Willis, Marcelo Cintra | 2025-08-05 |
| 12373335 | Memory thin provisioning using memory pools | Debra Bernstein, Hugh Wilkinson, Douglas Carrigan, Matthew J. Adiletta, Durgesh Srivastava +3 more | 2025-07-29 |
| 12192024 | Shared memory | Sujoy Sen, Thomas E. Willis, Durgesh Srivastava | 2025-01-07 |
| 12192023 | Page-based remote memory access using system memory interface network device | Sujoy Sen, Durgesh Srivastava, Thomas E. Willis, Marcelo Cintra | 2025-01-07 |
| 12132581 | Network interface controller with eviction cache | Sujoy Sen, Durgesh Srivastava, Thomas E. Willis, Marcelo Cintra | 2024-10-29 |
| 12086446 | Memory and storage pool interfaces | Sujoy Sen, Thomas E. Willis, Durgesh Srivastava, Marcelo Cintra, Donald L. Faw +1 more | 2024-09-10 |
| 11625277 | Dynamically augmenting edge resources | Francesc Guim Bernat, Kshitij A. Doshi, Suraj Prabhakaran, Timothy Verrall | 2023-04-11 |
| 11245604 | Techniques to support multiple interconnect protocols for a common set of interconnect connectors | Mahesh Wagh, Mark S. Myers, Stephen R. Van Doren, Dimitrios Ziakas | 2022-02-08 |
| 10917321 | Disaggregated physical memory resources in a data center | Mark A. Schmisseur | 2021-02-09 |
| 10884195 | Techniques to support multiple interconnect protocols for a common set of interconnect connectors | Mahesh Wagh, Mark S. Myers, Stephen R. Van Doren, Dimitrios Ziakas | 2021-01-05 |
| 10776524 | Secure communication channel for system management mode | Jiewen Yao, Vincent J. Zimmer | 2020-09-15 |
| 10719443 | Apparatus and method for implementing a multi-level memory hierarchy | Raj K. Ramanujan, Rajat Agarwal, Kai Cheng, Taarinya Polepeddi, Camille C. Raad +5 more | 2020-07-21 |
| 10432627 | Secure sensor data transport and processing | Hormuzd M. Khosravi, Vincent J. Zimmer | 2019-10-01 |
| 10331614 | Method and apparatus for server platform architectures that enable serviceable nonvolatile memory modules | Dimitrios Ziakas, Mohan J. Kumar, Murugasamy K. Nachimuthu, Thi Dang, Russell J. Wunderlich | 2019-06-25 |
| 10241912 | Apparatus and method for implementing a multi-level memory hierarchy | Raj K. Ramanujan, Rajat Agarwal, Kai Cheng, Taarinya Polepeddi, Camille C. Raad +5 more | 2019-03-26 |
| 10069826 | Secure sensor data transport and processing | Hormuzd M. Khosravi, Vincent J. Zimmer | 2018-09-04 |
| 9832876 | CPU package substrates with removable memory mechanical interfaces | Mani N. Prakash, Thomas T. Holden, Jeffory L. Smalley, Ram Viswanath, Dimitrios Ziakas +11 more | 2017-11-28 |
| 9769169 | Secure sensor data transport and processing | Hormuzd M. Khosravi, Vincent J. Zimmer | 2017-09-19 |
| 9600416 | Apparatus and method for implementing a multi-level memory hierarchy | Raj K. Ramanujan, Rajat Agarwal, Kai Cheng, Taarinya Polepeddi, Camille C. Raad +5 more | 2017-03-21 |
| 9317429 | Apparatus and method for implementing a multi-level memory hierarchy over common memory channels | Raj K. Ramanujan, Dimitrios Ziakas, David J. Zimmerman, Mohan J. Kumar, Muthukumar P. Swaminathan | 2016-04-19 |
| 7162560 | Partitionable multiprocessor system having programmable interrupt controllers | Billy K. Taylor, Mohan J. Kumar, Wilson E. Smoak, David J. O'Shea, Priscilla Lam +1 more | 2007-01-09 |