AP

Ashish Pancholy

Cypress Semiconductor: 18 patents #84 of 1,852Top 5%
SS Silicon Magnetic Systems: 4 patents #1 of 20Top 5%
Overall (All Time): #198,081 of 4,157,543Top 5%
22
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7809035 Eye-safe laser navigation sensor Steven Sanders, Gary A. Gibbs, Gajender Rohilla, Pulkit Shah 2010-10-05
6862215 MRAM data line configuration and method of operation Jerome S. Wolfman 2005-03-01
6775191 Memory circuit with selective address path Jong Hak Yuh, Gary A. Gibbs 2004-08-10
6683815 Magnetic memory cell and method for assigning tunable writing currents Eugene Chen, Kamel Ounadjela 2004-01-27
6664810 Multi-level programmable voltage control and output buffer with selectable operating voltage Gary A. Gibbs 2003-12-16
6639831 Localized MRAM data line and method of operation Jerome S. Wolfman 2003-10-28
6445645 Random access memory having independent read port and write port and process for writing to and reading from the same Mathew R. Arcoleo, Cathal G. Phelan, Simon J. Lovett 2002-09-03
6388927 Direct bit line-bit line defect detection test mode for SRAM Jonathan F. Churchill, Jeffrey F. Kooiman, Cathal G. Phelan, Gary A. Gibbs 2002-05-14
6385128 Random access memory having a read/write address bus and process for writing to and reading from the same Mathew R. Arcoleo, Cathal G. Phelan, Simon J. Lovett 2002-05-07
6380762 Multi-level programmable voltage control and output buffer with selectable operating voltage Gary A. Gibbs 2002-04-30
6359316 Method and apparatus to prevent latch-up in CMOS devices Peter Voss, Andrew J. Walker, Jeff Watt, Cathal G. Phelan, Patrick Zicolello +1 more 2002-03-19
6292403 Circuit and method for implementing single-cycle read/write operation(s), and random access memory including the circuit and/or practicing the method Cathal G. Phelan, Simon J. Lovett 2001-09-18
6286118 Scan path circuitry including a programmable delay circuit Jonathan F. Churchill, Neil P. Raftery, Colin J. Hendry, Jeyakumar Shanmugam, Mark A. Finn +2 more 2001-09-04
6262937 Synchronous random access memory having a read/write address bus and process for writing to and reading from the same Mathew R. Arcoleo, Cathal G. Phelan, Simon J. Lovett 2001-07-17
6262936 Random access memory having independent read port and write port and process for writing to and reading from the same Mathew R. Arcoleo, Cathal G. Phelan, Simon J. Lovett 2001-07-17
6115836 Scan path circuitry for programming a variable clock pulse width Jonathan F. Churchill, Neil P. Raftery, Colin J. Hendry, Jeyakumar Shanmugam, Mark A. Finn +2 more 2000-09-05
6069839 Circuit and method for implementing single-cycle read/write operation(s), and random access memory including the circuit and/or practicing the method Cathal G. Phelan, Simon J. Lovett 2000-05-30
6006347 Test mode features for synchronous pipelined memories Jonathan F. Churchill, Neil P. Raftery, Colin J. Hendry, Jeyakumar Shanmugam, Mark A. Finn +2 more 1999-12-21
5953285 Scan path circuitry including an output register having a flow through mode Jonathan F. Churchill, Neil P. Raftery, Jeyakumar Shanmugam, Mark A. Finn, Thomas M. Surrette +1 more 1999-09-14
5936977 Scan path circuitry including a programmable delay circuit Jonathan F. Churchill, Neil P. Raftery, Colin J. Hendry, Jeyakumar Shanmugam, Mark A. Finn +2 more 1999-08-10
5903174 Method and apparatus for reducing skew among input signals within an integrated circuit Greg J. Landry, Shailesh Shah 1999-05-11
5864251 Method and apparatus for self-resetting logic circuitry Raymond E. Bloker, Gary A. Gibbs 1999-01-26