Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6404682 | Wired address compare circuit and method | James Lutley, Jonathan F. Churchill, Kenneth A. Maher | 2002-06-11 |
| 6362668 | Circuit and method for frequency generator control | James Lutley | 2002-03-26 |
| 6360307 | Circuit architecture and method of writing data to a memory | Mathew R. Arcoleo | 2002-03-19 |
| 6288948 | Wired address compare circuit and method | James Lutley, Jonathan F. Churchill, Kenneth A. Maher | 2001-09-11 |
| 6286118 | Scan path circuitry including a programmable delay circuit | Jonathan F. Churchill, Colin J. Hendry, Jeyakumar Shanmugam, Mark A. Finn, Thomas M. Surrette +2 more | 2001-09-04 |
| 6115836 | Scan path circuitry for programming a variable clock pulse width | Jonathan F. Churchill, Colin J. Hendry, Jeyakumar Shanmugam, Mark A. Finn, Thomas M. Surrette +2 more | 2000-09-05 |
| 6006347 | Test mode features for synchronous pipelined memories | Jonathan F. Churchill, Colin J. Hendry, Jeyakumar Shanmugam, Mark A. Finn, Thomas M. Surrette +2 more | 1999-12-21 |
| 5953285 | Scan path circuitry including an output register having a flow through mode | Jonathan F. Churchill, Jeyakumar Shanmugam, Mark A. Finn, Thomas M. Surrette, Cathal G. Phelan +1 more | 1999-09-14 |
| 5936977 | Scan path circuitry including a programmable delay circuit | Jonathan F. Churchill, Colin J. Hendry, Jeyakumar Shanmugam, Mark A. Finn, Thomas M. Surrette +2 more | 1999-08-10 |