Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7809035 | Eye-safe laser navigation sensor | Steven Sanders, Ashish Pancholy, Gajender Rohilla, Pulkit Shah | 2010-10-05 |
| 7095647 | Magnetic memory array with an improved world line configuration | Frederick B. Jenne | 2006-08-22 |
| 7082053 | Non-volatile latch with magnetic junctions | Fredrick L. Jenne | 2006-07-25 |
| 7057919 | Magnetic memory array configuration | Frederick B. Jenne | 2006-06-06 |
| 6775191 | Memory circuit with selective address path | Ashish Pancholy, Jong Hak Yuh | 2004-08-10 |
| 6710636 | Method and system for high resolution delay lock loop | Lingsong Xu, Sanjay Sancheti | 2004-03-23 |
| 6664810 | Multi-level programmable voltage control and output buffer with selectable operating voltage | Ashish Pancholy | 2003-12-16 |
| 6388927 | Direct bit line-bit line defect detection test mode for SRAM | Jonathan F. Churchill, Jeffrey F. Kooiman, Cathal G. Phelan, Ashish Pancholy | 2002-05-14 |
| 6384621 | Programmable transmission line impedance matching circuit | Manoj B. Roge | 2002-05-07 |
| 6380762 | Multi-level programmable voltage control and output buffer with selectable operating voltage | Ashish Pancholy | 2002-04-30 |
| 5864251 | Method and apparatus for self-resetting logic circuitry | Raymond E. Bloker, Ashish Pancholy | 1999-01-26 |
| 5666069 | Data output stage incorporating an inverting operational amplifier | — | 1997-09-09 |
| 5640356 | Two-stage differential sense amplifier with positive feedback in the first and second stages | — | 1997-06-17 |
| 4933899 | Bi-CMOS semiconductor memory cell | — | 1990-06-12 |