VD

Vivek K. De

IN Intel: 241 patents #38 of 30,777Top 1%
Micron: 3 patents #3,077 of 6,345Top 50%
📍 Beaverton, OR: #8 of 3,140 inventorsTop 1%
🗺 Oregon: #36 of 28,073 inventorsTop 1%
Overall (All Time): #2,088 of 4,157,543Top 1%
245
Patents All Time

Issued Patents All Time

Showing 26–50 of 245 patents

Patent #TitleCo-InventorsDate
9870012 Digitally phase locked low dropout regulator apparatus and system using ring oscillators Arijit Raychowdhury, Dinesh Somasekhar, James W. Tschanz 2018-01-16
9819266 Digitally controlled zero current switching Vaibhav Vaidya, Krishnan Ravichandran 2017-11-14
9787571 Link delay based routing apparatus for a network-on-chip Ram Krishnamurthy, Gregory K. Chen, Mark A. Anders, Himanshu Kaul 2017-10-10
9772903 Resilient register file circuit for dynamic variation tolerance and method of operating the same Jaydeep P. Kulkarni, Keith Alan Bowman, James W. Tschanz 2017-09-26
9722606 Digital clamp for state retention Arijit Raychowdhury, Charles Augustine, James W. Tschanz 2017-08-01
9678878 Disabling cache portions during low voltage operations Christopher B. Wilkerson, Muhammad M. Khellah, Ming Zhang, Jaume Abella, Javier Carretero Casado +3 more 2017-06-13
9633716 Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks Jaydeep P. Kulkarni, Bibiche M. Geuskens, James W. Tschanz, Muhammed M. Khellah 2017-04-25
9627039 Apparatus for reducing write minimum supply voltage for memory Jaydeep P. Kulkarni, Muhammad M. Khellah, James W. Tschanz, Bibiche M. Geuskens 2017-04-18
9600283 Single instruction for specifying a subset of registers to save prior to entering low-power mode, and for specifying a pointer to a function executed after exiting low-power mode Ethan Schuchman, Hong Wang, Chris Weaver, Belliappa Kuttanna, Asit K. Mallick +1 more 2017-03-21
9594625 Sequential circuit with error detection Keith Alan Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Christopher B. Wilkerson +2 more 2017-03-14
9577641 Spin transfer torque based memory elements for programmable device arrays Arijit Raychowdhury, James W. Tschanz 2017-02-21
9520877 Apparatus and method for detecting or repairing minimum delay errors Pascal A. Meinerzhagen, Sandip Kundu, James W. Tschanz 2016-12-13
9484917 Digital clamp for state retention Arijit Raychowdhury, Charles Augustine, James W. Tschanz 2016-11-01
9329918 Resilient register file circuit for dynamic variation tolerance and method of operating the same Jaydeep P. Kulkarni, Keith Alan Bowman, James W. Tschanz 2016-05-03
9299395 Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks Jaydeep P. Kulkarni, Bibiche M. Geuskens, James W. Tschanz, Muhammad M. Khellah 2016-03-29
9270278 Spin transfer torque based memory elements for programmable device arrays Arijit Raychowdhury, James W. Tschanz 2016-02-23
9230636 Apparatus for dual purpose charge pump Pascal A. Meinerzhagen, Jaydeep P. Kulkarni, Muhammad M. Khellah, Cyrille Dray, Dinesh Somasekhar +1 more 2016-01-05
9189014 Sequential circuit with error detection Keith Alan Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Christopher B. Wilkerson +2 more 2015-11-17
9164764 Single instruction for specifying and saving a subset of registers, specifying a pointer to a work-monitoring function to be executed after waking, and entering a low-power mode Ethan Schuchman, Hong Wang, Chris Weaver, Belliappa Kuttanna, Asit K. Mallick +1 more 2015-10-20
9153304 Apparatus for reducing write minimum supply voltage for memory Jaydeep P. Kulkarni, Muhammad M. Khellah, James W. Tschanz, Bibiche M. Geuskens 2015-10-06
9124174 DC-DC converter switching transistor current measurement technique Gerhard Schrom, Peter Hazucha, Tanay Karnik 2015-09-01
9063730 Performing variation-aware profiling and dynamic core allocation for a many-core processor Saurabh Dighe, Sriram R. Vangal, Nitin Y. Borkar 2015-06-23
8994344 Multiphase transformer for a multiphase DC-DC converter Gerhard Schrom, Peter Hazucha, Jaeseo Lee, Tanay Karnik, Fabrice Paillet 2015-03-31
8868836 Reducing minimum operating voltage through hybrid cache design Muhammad M. Khellah, Christopher B. Wilkerson, Alaa R. Alameldeen, Bibiche M. Geuskens, Tanay Karnik +1 more 2014-10-21
8824198 Circuits and methods for reducing minimum supply for register file cells DiaaEidin S. Khalil, Muhammad M. Khellah, Moty Mehalel, George Shchupak 2014-09-02