Issued Patents All Time
Showing 51–75 of 245 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8769376 | Memory cell supply voltage control based on error detection | Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim | 2014-07-01 |
| 8762692 | Single instruction for specifying and saving a subset of registers, specifying a pointer to a work-monitoring function to be executed after waking, and entering a low-power mode | Ethan Schuchman, Hong Wang, Chris Weaver, Belliappa Kuttanna, Asit K. Mallick +1 more | 2014-06-24 |
| 8667367 | Memory cell supply voltage control based on error detection | Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim | 2014-03-04 |
| 8513741 | Logic circuits using carbon nanotube transistors | Ali Keshavarzi, Juanita N. Kurtin | 2013-08-20 |
| 8488390 | Circuits and methods for memory | Jaydeep P. Kulkarni, Dinesh Somasekhar, James W. Tschanz | 2013-07-16 |
| 8482552 | DC-DC converter switching transistor current measurement technique | Gerhard Schrom, Peter Hazucha, Tanay Karnik | 2013-07-09 |
| 8467263 | Memory write operation methods and circuits | Jaydeep P. Kulkarni, Muhammad M. Khellah, Bibiche M. Geuskens, Arijit Raychowdhury, Tanay Karnik | 2013-06-18 |
| 8462541 | Circuits and methods for reducing minimum supply for register file cells | DiaaEldin S. Khalil, Muhammad M. Khellah, Moty Mehalel, George Shchupak | 2013-06-11 |
| 8389976 | Methods of forming carbon nanotube transistors for high speed circuit operation and structures formed thereby | Arijit Raychowdhury, Ali Keshavarzi, Juanita N. Kurtin | 2013-03-05 |
| 8358112 | Multiphase transformer for a multiphase DC-DC converter | Gerhard Schrom, Peter Hazucha, Jaeseo Lee, Fabrice Paillet, Tanay Karnik | 2013-01-22 |
| 8312306 | Component reliability budgeting system | Siva G. Narendra, James W. Tschanz, Stephen H. Tang | 2012-11-13 |
| 8301970 | Sequential circuit with error detection | Keith Alan Bowman, James Tachanz, Nam Sung Kim, Janice C. Lee, Chris Wilkerson +2 more | 2012-10-30 |
| 8291168 | Disabling cache portions during low voltage operations | Christopher B. Wilkerson, Muhammad M. Khellah, Ming Zhang, Jaume Abella, Javier Carretero Casado +3 more | 2012-10-16 |
| 8288846 | Power management integrated circuit | Siva G. Narendra, James W. Tschanz, Howard A. Wilson, Donald S. Gardner, Peter Hazucha +4 more | 2012-10-16 |
| 8232588 | Increasing the surface area of a memory cell capacitor | Brian S. Doyle, Robert S. Chau, Suman Datta, Dinesh Somasekhar | 2012-07-31 |
| 8138042 | Capacitor, method of increasing a capacitance area of same, and system containing same | Brian S. Doyle, Robert S. Chau, Suman Datta, Ali Keshavarzi, Dinesh Somasekhar | 2012-03-20 |
| 8134548 | DC-DC converter switching transistor current measurement technique | Gerhard Schrom, Peter Hazucha, Tanay Karnik | 2012-03-13 |
| 8111579 | Circuits and methods for reducing minimum supply for register file cells | DiaaEldin S. Khalil, Muhammad M. Khellah, Moty Mehalel, George Shchupak | 2012-02-07 |
| 8103830 | Disabling cache portions during low voltage operations | Christopher B. Wilkerson, Muhammad M. Khellah, Ming Zhang, Jaume Abella, Javier Carretero Casado +3 more | 2012-01-24 |
| 8004043 | Logic circuits using carbon nanotube transistors | Ali Keshavarzi, Juanita Kurtlin | 2011-08-23 |
| 8006164 | Memory cell supply voltage control based on error detection | Khellah Muhammad, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim | 2011-08-23 |
| 7859081 | Capacitor, method of increasing a capacitance area of same, and system containing same | Brian S. Doyle, Robert S. Chau, Suman Datta, Ali Keshavarzi, Dinesh Somasekhar | 2010-12-28 |
| 7817068 | Low power serial link bus architecture | Maged Ghoneima, Muhammad M. Khellah | 2010-10-19 |
| 7812631 | Sleep transistor array apparatus and method with leakage control circuitry | Nam Sung Kim | 2010-10-12 |
| 7787292 | Carbon nanotube fuse element | Ali Keshavarzi, Juanita N. Kurtin, Janice C. Lee, Tanay Karnik, Timothy L. Deeter | 2010-08-31 |