SS

Sreenivas Subramoney

IN Intel: 74 patents #353 of 30,777Top 2%
📍 Kanchinakote, CA: #15 of 195 inventorsTop 8%
Overall (All Time): #25,871 of 4,157,543Top 1%
74
Patents All Time

Issued Patents All Time

Showing 26–50 of 74 patents

Patent #TitleCo-InventorsDate
11693780 System, method, and apparatus for enhanced pointer identification and prefetching Stanislav Shwartsman, Anant Vithal Nori, Shankar Balachandran, Elad Shtiegmann, Vineeth Mekkat +2 more 2023-07-04
11656971 Technology for dynamically tuning processor features Adarsh Chauhan, Jayesh Gaur, Franck Sala, Lihu Rappoport, Zeev Sperber +1 more 2023-05-23
11645078 Detecting a dynamic control flow re-convergence point for conditional branches in hardware Adarsh Chauhan, Franck Sala, Jayesh Gaur, Zeev Sperber, Lihu Rappoport +1 more 2023-05-09
11620818 Spatially sparse neural network accelerator for multi-dimension visual analytics Kamlesh Pillai, Gurpreet Singh Kalsi, Prashant Laddha, Om Ji Omer 2023-04-04
11575504 Cryptographic computing engine for memory load and store units of a microarchitecture pipeline David M. Durham, Michael LeMay, Michael E. Kounavis, Santosh Ghosh, Sergej Deutsch +3 more 2023-02-07
11347828 Methods, apparatus, articles of manufacture to perform accelerated matrix multiplication Biji George, Om Ji Omer, Dipan Kumar Mandal, Cormac Brick, Lance Hacking +1 more 2022-05-31
11321089 Instruction set architecture based and automatic load tracking for opportunistic re-steer of data-dependent flaky branches Saurabh Gupta, Niranjan Soundararajan, Ragavendra Natarajan 2022-05-03
11256599 Technology for dynamically tuning processor features Adarsh Chauhan, Jayesh Gaur, Franck Sala, Lihu Rappoport, Zeev Sperber +1 more 2022-02-22
11238309 Selecting keypoints in images using descriptor scores Dipan Kumar Mandal, Gurpreet Singh Kalsi, Om Ji Omer, Prashant Laddha 2022-02-01
11188467 Multi-level system memory with near memory capable of storing compressed cache lines Israel Diamand, Alaa R. Alameldeen, Supratik Majumder, Srinivas Santosh Kumar MADUGULA, Jayesh Gaur +2 more 2021-11-30
11080194 System, method, and apparatus for enhanced pointer identification and prefetching Stanislav Shwartsman, Anant Vithal Nori, Shankar Balachandran, Elad Shtiegmann, Vineeth Mekkat +2 more 2021-08-03
11043256 High bandwidth destructive read embedded memory Kaushik Vaidyanathan, Huichu Liu, Tanay Karnik, Jayesh Gaur, Sudhanshu Shukla 2021-06-22
10956327 Systems and methods for mitigating dram cache conflicts through hardware assisted redirection of pages (HARP) Adithya NALLAN CHAKRAVARTHI, Anant Vithal Nori, Jayesh Gaur 2021-03-23
10949208 System, apparatus and method for context-based override of history-based branch predictions Saurabh Gupta, Niranjan Soundararajan, Ragavendra Natarajan, Jared W. Stark, IV, Lihu Rappoport 2021-03-16
10915421 Technology for dynamically tuning processor features Adarsh Chauhan, Jayesh Gaur, Franck Sala, Lihu Rappoport, Zeev Sperber +1 more 2021-02-09
10866902 Memory aware reordered source Ishwar Bhati, Udit Dhawan, Jayesh Gaur 2020-12-15
10846084 Supporting timely and context triggered prefetching in microprocessors Anant Vithal Nori, Shankar Balachandran, Hong Wang 2020-11-24
10846093 System, apparatus and method for focused data value prediction to accelerate focused instructions Sumeet Bandishte, Jayesh Gaur, Hong Wang 2020-11-24
10776270 Memory-efficient last level cache architecture Jayesh Gaur, Ayan Mandal, Anant Vithal Nori 2020-09-15
10754655 Automatic predication of hard-to-predict convergent branches Adarsh Chauhan, Hong Wang, Jayesh Gaur, Zeev Sperber, Sumeet Bandishte +4 more 2020-08-25
10719355 Criticality based port scheduling Pooja Roy, Jayesh Gaur, Zeev Sperber, Alexandr Titov, Lihu Rappoport +5 more 2020-07-21
10713053 Adaptive spatial access prefetcher apparatus and method Rahul Bera, Anant Vithal Nori, Hong Wang 2020-07-14
10664281 Apparatuses and methods for dynamic asymmetric scaling of branch predictor tables Ragavendra Natarajan, Niranjan Soundararajan, Saurabh Gupta 2020-05-26
10642621 System, apparatus and method for controlling allocations into a branch prediction circuit of a processor Ragavendra Natarajan, Niranjan Soundararajan 2020-05-05
10579414 Misprediction-triggered local history-based branch prediction Niranjan Soundararajan, Saurabh Gupta, Rahul Pal, Ragavendra Natarajan, Daniel Deng +3 more 2020-03-03