| 10955885 |
Methods and systems to control power gates during an active state of a gated domain based on load conditions of the gated domain |
Michael Zelikson, Vjekoslav Svilan, Norbert Unger |
2021-03-23 |
$29,278,000 |
| 10536139 |
Charge-saving power-gate apparatus and method |
Norbert Unger, Michael Zelikson |
2020-01-14 |
$30,813,000 |
| 10228738 |
Methods and systems to control power gates during an active state of a gated domain based on load conditions of the gated domain |
Michael Zelikson, Vjekoslav Svilan, Norbert Unger |
2019-03-12 |
$21,255,000 |
| 9966940 |
Charge-saving power-gate apparatus and method |
Norbert Unger, Michael Zelikson |
2018-05-08 |
$30,284,000 |
| 9874925 |
Method and apparatus for a zero voltage processor sleep state |
Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer +1 more |
2018-01-23 |
$21,180,000 |
| 9870044 |
Method and apparatus for a zero voltage processor sleep state |
Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer +1 more |
2018-01-16 |
$17,139,000 |
| 9841807 |
Method and apparatus for a zero voltage processor sleep state |
Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer +1 more |
2017-12-12 |
$18,742,000 |
| 9235258 |
Method and apparatus for a zero voltage processor |
Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer +1 more |
2016-01-12 |
$15,498,000 |
| 9223389 |
Method and apparatus for a zero voltage processor |
Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer +1 more |
2015-12-29 |
$8,962,000 |
| 9223390 |
Method and apparatus for a zero voltage processor |
Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer +1 more |
2015-12-29 |
$8,962,000 |
| 9141180 |
Method and apparatus for a zero voltage processor sleep state |
Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer +1 more |
2015-09-22 |
$9,820,000 |
| 8707062 |
Method and apparatus for powered off processor core mode |
Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Stephen A. Fischer +1 more |
2014-04-22 |
$10,911,000 |
| 7664970 |
Method and apparatus for a zero voltage processor sleep state |
Sanjeev Jahagirdar, George Varghese, John B. Conrad, Robert Milstrey, Stephen A. Fischer +1 more |
2010-02-16 |
$21,778,000 |
| 7523327 |
System and method of coherent data transfer during processor idle states |
Leslie E. Cline, Siripong Sritanyaratana, Alon Naveh, Eric C. Samson, Michael N. Derr |
2009-04-21 |
$22,748,000 |
| 7233162 |
Arrangements having IC voltage and thermal resistance designated on a per IC basis |
Tawfik Arabi, Hung-Piao Ma, Gregory M. Iovino, Avner Kornfeld, Gregory F. Taylor |
2007-06-19 |
$30,093,000 |
| 7112979 |
Testing arrangement to distribute integrated circuits |
Tawfik Arabi, Hung-Piao Ma, Gregory M. Iovino, Avner Kornfeld, Gregory F. Taylor |
2006-09-26 |
$21,238,000 |
| 7109737 |
Arrangements having IC voltage and thermal resistance designated on a per IC basis |
Tawfik Arabi, Hung-Piao Ma, Gregory M. Iovino, Avner Kornfeld, Gregory F. Taylor |
2006-09-19 |
$12,802,000 |
| 6314553 |
Circuit synthesis and verification using relative timing |
Kenneth S. Stevens, Ran Ginosar |
2001-11-06 |
$210,286,000 |
| 5978899 |
Apparatus and method for parallel processing and self-timed serial marking of variable length instructions |
Ran Ginosar, Rakefet Kol, Kenneth S. Stevens, Peter A. Beerel, Kenneth Yi Yun +1 more |
1999-11-02 |
$87,065,000 |
| 5948096 |
Apparatus and method for self-timed marking of variable length instructions having length-affecting prefix bytes |
Ran Ginosar, Rakefet Kol, Kenneth S. Stevens, Peter A. Beerel, Kenneth Yi Yun +1 more |
1999-09-07 |
$115,425,000 |
| 5941982 |
Efficient self-timed marking of lengthy variable length instructions |
Ran Ginosar, Rakefet Kol, Kenneth S. Stevens, Peter A. Beerel, Kenneth Yi Yun +1 more |
1999-08-24 |
$173,687,000 |
| 5931944 |
Branch instruction handling in a self-timed marking system |
Ran Ginosar, Rakefet Kol, Kenneth S. Stevens, Peter A. Beerel, Kenneth Yi Yun +1 more |
1999-08-03 |
$168,638,000 |
| 5574872 |
Method and apparatus for controlling the saving of pipelines in pipelined processors during trap handling |
Benny Lavi, Michael Kagan |
1996-11-12 |
$38,860,000 |
| 5465216 |
Automatic design verification |
Ze'ev Shtadler |
1995-11-07 |
$211,387,000 |
| 5265227 |
Parallel protection checking in an address translation look-aside buffer |
Leslie D. Kohn |
1993-11-23 |
$32,103,000 |
