| 9170626 |
Performance reduction limit for power consumption device |
Sitaram Yadavalli, Ishmael F. Santos, Jim Hermerding |
2015-10-27 |
| 7884499 |
Intervention of independent self-regulation of power consumption devices |
Sitaram Yadavalli, Ishmael F. Santos, Jim Hermerding |
2011-02-08 |
| 7523327 |
System and method of coherent data transfer during processor idle states |
Siripong Sritanyaratana, Alon Naveh, Shai Rotem, Eric C. Samson, Michael N. Derr |
2009-04-21 |
| 7472289 |
Audio noise mitigation for power state transitions |
Jorge P. Rodriguez, Barnes Cooper |
2008-12-30 |
| 7373534 |
Reducing storage data transfer interference with processor power management |
— |
2008-05-13 |
| 7343502 |
Method and apparatus for dynamic DLL powerdown and memory self-refresh |
Eric C. Samson, Aditya Navale |
2008-03-11 |
| 7340550 |
USB schedule prefetcher for low power |
Michael N. Derr, John S. Howard, Darren Abramson, Rob Strong |
2008-03-04 |
| 7281074 |
Method and apparatus to quiesce USB activities using interrupt descriptor caching and asynchronous notifications |
Paul S. Diefenbaugh, James P. Kardach, Barnes Cooper |
2007-10-09 |
| 7231468 |
Future activity list for peripheral bus host controller |
— |
2007-06-12 |
| 7225347 |
Method and apparatus for enabling a low power mode for a processor |
Xia Dai, John W. Horigan, Millind Mittal |
2007-05-29 |
| 7149909 |
Power management for an integrated graphics device |
Ying Cui, Eric C. Samson, Ariel Berkovits, Aditya Navale, David Wyatt +5 more |
2006-12-12 |
| 7069367 |
Method and apparatus for avoiding race condition with edge-triggered interrupts |
David I. Poisner |
2006-06-27 |
| 7027057 |
Entering and exiting power managed states without disrupting accelerated graphics port transactions |
Satchit Jain, Debra T. Cohen, Barnes Cooper, Anil V. Nanduri |
2006-04-11 |
| 6988211 |
System and method for selecting a frequency and voltage combination from a table using a selection field and a read-only limit field |
Xia Dai, Varghese George, Robert L. Farrell |
2006-01-17 |
| 6976181 |
Method and apparatus for enabling a low power mode for a processor |
Xia Dai, John W. Horigan, Millind Mittal |
2005-12-13 |
| 6871252 |
Method and apparatus for logical detach for a hot-plug-in data bus |
— |
2005-03-22 |
| 6802018 |
Method and apparatus to directly access a peripheral device when central processor operations are suspended |
David Bormann, Frank P. Hart, Rudi Rughoonundon |
2004-10-05 |
| 6748548 |
Computer peripheral device that remains operable when central processor operations are suspended |
David Bormann, Frank P. Hart, Siripong Sritanyarantana |
2004-06-08 |
| 6738068 |
Entering and exiting power managed states without disrupting accelerated graphics port transactions |
Debra T. Cohen, Barnes Cooper, Satchit Jain, Anil V. Nanduri |
2004-05-18 |
| 6704877 |
Dynamically changing the performance of devices in a computer platform |
Varghese George, David Wyatt |
2004-03-09 |
| 5826107 |
Method and apparatus for implementing a DMA timeout counter feature |
Edward J. Chejlava, Jr., Anh Pham |
1998-10-20 |
| 5655145 |
Peripheral interface circuit which snoops commands to determine when to perform DMA protocol translation |
Edward J. Chejlava, Jr., Kenneth C. Curt |
1997-08-05 |
| 5630171 |
Translating from a PIO protocol to DMA protocol with a peripheral interface circuit |
Edward J. Chejlava, Jr., Kenneth C. Curt |
1997-05-13 |
| 5603052 |
Interface circuit for transferring data between host and mass storage by assigning address in the host memory space and placing the address on the bus |
Edward J. Chejlava, Jr., Kenneth C. Curt |
1997-02-11 |
| 5592682 |
Interface circuit for transferring data between host device and mass storage device in response to designated address in host memory space assigned as data port |
Edward J. Chejlava, Jr., Kenneth C. Curt |
1997-01-07 |