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USPTO Patent Rankings Data through Dec 31, 2025
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Leslie E. Cline — 25 Patents

Intel: 20 patents #2,048 of 30,777Top 7%
CLCirrus Logic: 5 patents #283 of 1,131Top 30%
Sunnyvale, CA: #976 of 14,302 inventorsTop 7%
California: #22,079 of 386,348 inventorsTop 6%
Overall (All Time): #158,593 of 4,157,543Top 4%
25 Patents All Time
Leslie E. Cline has been granted 25 US patents while listed as an inventor at Intel. The first was granted in 1997 and the most recent in October 2015. Leslie E. Cline ranks #158,593 of 4,157,543 US inventors in our database (top 3.8%). Patent records list Leslie E. Cline in Sunnyvale, CA, US.

Issued Patents All Time

Showing 1–25 of 25 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9170626 Performance reduction limit for power consumption device Sitaram Yadavalli, Ishmael F. Santos, Jim Hermerding 2015-10-27 $18,168,000
7884499 Intervention of independent self-regulation of power consumption devices Sitaram Yadavalli, Ishmael F. Santos, Jim Hermerding 2011-02-08 $12,723,000
7523327 System and method of coherent data transfer during processor idle states Siripong Sritanyaratana, Alon Naveh, Shai Rotem, Eric C. Samson, Michael N. Derr 2009-04-21 $22,748,000
7472289 Audio noise mitigation for power state transitions Jorge P. Rodriguez, Barnes Cooper 2008-12-30 $13,967,000
7373534 Reducing storage data transfer interference with processor power management 2008-05-13 $17,373,000
7343502 Method and apparatus for dynamic DLL powerdown and memory self-refresh Eric C. Samson, Aditya Navale 2008-03-11 $19,082,000
7340550 USB schedule prefetcher for low power Michael N. Derr, John S. Howard, Darren Abramson, Rob Strong 2008-03-04 $16,330,000
7281074 Method and apparatus to quiesce USB activities using interrupt descriptor caching and asynchronous notifications Paul S. Diefenbaugh, James P. Kardach, Barnes Cooper 2007-10-09 $11,205,000
7231468 Future activity list for peripheral bus host controller 2007-06-12 $15,149,000
7225347 Method and apparatus for enabling a low power mode for a processor Xia Dai, John W. Horigan, Millind Mittal 2007-05-29 $13,871,000
7149909 Power management for an integrated graphics device Ying Cui, Eric C. Samson, Ariel Berkovits, Aditya Navale, David Wyatt +5 more 2006-12-12 $16,980,000
7069367 Method and apparatus for avoiding race condition with edge-triggered interrupts David I. Poisner 2006-06-27 $17,073,000
7027057 Entering and exiting power managed states without disrupting accelerated graphics port transactions Satchit Jain, Debra T. Cohen, Barnes Cooper, Anil V. Nanduri 2006-04-11 $16,494,000
6988211 System and method for selecting a frequency and voltage combination from a table using a selection field and a read-only limit field Xia Dai, Varghese George, Robert L. Farrell 2006-01-17 $23,461,000
6976181 Method and apparatus for enabling a low power mode for a processor Xia Dai, John W. Horigan, Millind Mittal 2005-12-13 $11,810,000
6871252 Method and apparatus for logical detach for a hot-plug-in data bus 2005-03-22 $25,941,000
6802018 Method and apparatus to directly access a peripheral device when central processor operations are suspended David Bormann, Frank P. Hart, Rudi Rughoonundon 2004-10-05 $22,015,000
6748548 Computer peripheral device that remains operable when central processor operations are suspended David Bormann, Frank P. Hart, Siripong Sritanyarantana 2004-06-08 $20,315,000
6738068 Entering and exiting power managed states without disrupting accelerated graphics port transactions Debra T. Cohen, Barnes Cooper, Satchit Jain, Anil V. Nanduri 2004-05-18 $30,392,000
6704877 Dynamically changing the performance of devices in a computer platform Varghese George, David Wyatt 2004-03-09 $36,606,000
5826107 Method and apparatus for implementing a DMA timeout counter feature Edward J. Chejlava, Jr., Anh Pham 1998-10-20 $2,309,000
5655145 Peripheral interface circuit which snoops commands to determine when to perform DMA protocol translation Edward J. Chejlava, Jr., Kenneth C. Curt 1997-08-05 $8,222,000
5630171 Translating from a PIO protocol to DMA protocol with a peripheral interface circuit Edward J. Chejlava, Jr., Kenneth C. Curt 1997-05-13 $2,117,000
5603052 Interface circuit for transferring data between host and mass storage by assigning address in the host memory space and placing the address on the bus Edward J. Chejlava, Jr., Kenneth C. Curt 1997-02-11 $7,698,000
5592682 Interface circuit for transferring data between host device and mass storage device in response to designated address in host memory space assigned as data port Edward J. Chejlava, Jr., Kenneth C. Curt 1997-01-07 $4,498,000