Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Interface circuit for transferring data between host device and mass storage device in response to designated address in host memory space assigned as data port

Interface circuit for transferring data between host device and mass storage device in response to designated address in host memory space assigned as data port

US Patent 5592682 · Granted Jan 7, 1997

Estimated economic value: $4,498,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Performance reduction limit for power consumption device2015
Intervention of independent self-regulation of power consumption devices2011
System and method of coherent data transfer during processor idle states2009
Audio noise mitigation for power state transitions2008
Reducing storage data transfer interference with processor power management2008
Method and apparatus for dynamic DLL powerdown and memory self-refresh2008
USB schedule prefetcher for low power2008
Method and apparatus to quiesce USB activities using interrupt descriptor cachin2007
Future activity list for peripheral bus host controller2007
Method and apparatus for enabling a low power mode for a processor2007
Power management for an integrated graphics device2006
Method and apparatus for avoiding race condition with edge-triggered interrupts2006