Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12197914 | Computing machine with secure matrix space | — | 2025-01-14 |
| 12197915 | Parallel instruction demarcator | — | 2025-01-14 |
| 11907714 | Secure matrix space with partitions for concurrent use | — | 2024-02-20 |
| 11740903 | Computing machine using a matrix space and matrix pointer registers for matrix and array processing | — | 2023-08-29 |
| 11237828 | Secure matrix space with partitions for concurrent use | — | 2022-02-01 |
| 11204768 | Instruction length based parallel instruction demarcator | — | 2021-12-21 |
| 10600475 | Method and apparatus for storing and accessing matrices and arrays by columns and rows in a processing unit | — | 2020-03-24 |
| 9170626 | Performance reduction limit for power consumption device | Leslie E. Cline, Ishmael F. Santos, Jim Hermerding | 2015-10-27 |
| 7884499 | Intervention of independent self-regulation of power consumption devices | Leslie E. Cline, Ishmael F. Santos, Jim Hermerding | 2011-02-08 |
| 7168010 | Various methods and apparatuses to track failing memory locations to enable implementations for invalidating repeatedly failing memory locations | Tracy Garrett Drysdale, Husnara Khan | 2007-01-23 |
| 6973422 | Method and apparatus for modeling and circuits with asynchronous behavior | Sandip Kundu | 2005-12-06 |
| 6237121 | Method and apparatus for performing register transfer level scan selection | Sanjay Sengupta | 2001-05-22 |