Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9875327 | Timing violation resilient asynchronous template | Melvin Breuer, Benmao Cheng, Dylan Hand | 2018-01-23 |
| 9558309 | Timing violation resilient asynchronous template | Melvin Breuer, Benmao Cheng, Dylan Hand | 2017-01-31 |
| 8972915 | Static timing analysis of template-based asynchronous circuits | Mallika Prakash | 2015-03-03 |
| 8495543 | Multi-level domino, bundled data, and mixed templates | Georgios Dimou, Andrew Lines | 2013-07-23 |
| 8448105 | Clustering and fanout optimizations of asynchronous circuits | Georgios Dimou, Andrew Lines | 2013-05-21 |
| 8086975 | Power aware asynchronous circuits | Ken Shiring, Andrew Lines, Arash Saifhashemi | 2011-12-27 |
| 8051396 | Logic synthesis of multi-level domino asynchronous pipelines | Andrew Lines, Michael Davies | 2011-11-01 |
| 7584449 | Logic synthesis of multi-level domino asynchronous pipelines | Andrew Lines, Michael Davies | 2009-09-01 |
| 7197691 | Reduced-latency soft-in/soft-out module | Keith M. Chugg, Georgios Dimou, Phunsak Thiennviboon | 2007-03-27 |
| 6854096 | Optimization of cell subtypes in a hierarchical design flow | Frederik Eaton | 2005-02-08 |
| 6785875 | Methods and apparatus for facilitating physical synthesis of an integrated circuit design | Andrew Lines, Qing Bo Wu | 2004-08-31 |
| 6690752 | Sequential decoder for decoding of convolutional codes | Keith M. Chugg, Recep O. Ozdag, Sunan Tugsinavisut, Sushil Singh, Phunsak Thiennviboon | 2004-02-10 |
| 6526551 | Formal verification of a logic design through implicit enumeration of strongly connected components | Aiguo Xie | 2003-02-25 |
| 5978899 | Apparatus and method for parallel processing and self-timed serial marking of variable length instructions | Ran Ginosar, Rakefet Kol, Kenneth S. Stevens, Kenneth Yi Yun, Christopher John Myers +1 more | 1999-11-02 |
| 5948096 | Apparatus and method for self-timed marking of variable length instructions having length-affecting prefix bytes | Ran Ginosar, Rakefet Kol, Kenneth S. Stevens, Kenneth Yi Yun, Christopher John Myers +1 more | 1999-09-07 |
| 5941982 | Efficient self-timed marking of lengthy variable length instructions | Ran Ginosar, Rakefet Kol, Kenneth S. Stevens, Kenneth Yi Yun, Christopher John Myers +1 more | 1999-08-24 |
| 5931944 | Branch instruction handling in a self-timed marking system | Ran Ginosar, Rakefet Kol, Kenneth S. Stevens, Kenneth Yi Yun, Christopher John Myers +1 more | 1999-08-03 |