Issued Patents All Time
Showing 26–38 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9563564 | Cache allocation with code and data prioritization | Andrew J. Herdrich, Edwin Verplanke, Ravishankar Iyer, Christopher C. Gianos, Jeffrey D. Chamberlain +2 more | 2017-02-07 |
| 9558127 | Instruction and logic for a cache prefetcher and dataless fill buffer | Stanislav Shwartsman, Robert S. Chappell, Ryan Carlson, Raanan Sade, Omar M. Shaikh +2 more | 2017-01-31 |
| 9424034 | Multiple register memory access instructions, processors, methods, and systems | Glenn J. Hinton, Bret L. Toll | 2016-08-23 |
| 9092214 | SIMD processor with programmable counters externally configured to count executed instructions having operands of particular register size and element size combination | Laura A. Knauth, Matthew C. Merten, Hugh M. Caffey | 2015-07-28 |
| 9081688 | Obtaining data for redundant multithreading (RMT) execution | Glenn J. Hinton, Steven Raasch, Sebastien Hily, John G. Holm, Avinash Sodani +4 more | 2015-07-14 |
| 8793689 | Redundant multithreading processor | Glenn J. Hinton, Steven Raasch, Avinash Sodani, Sebastien Hily, John G. Holm +1 more | 2014-07-29 |
| 7757045 | Synchronizing recency information in an inclusive cache hierarchy | Christopher Shannon, Per Hammarlund, Hermann W. Gartler, Glenn J. Hinton | 2010-07-13 |
| 7457938 | Staggered execution stack for vector processing | Stephan Jourdan, Avinash Sodani, Michael A. Fetterman, Per Hammarlund, Glenn J. Hinton | 2008-11-25 |
| 7457932 | Load mechanism | Per Hammarlund, Stephan Jourdan, Michael A. Fetterman, Glenn J. Hinton, Sebastien Hily | 2008-11-25 |
| 7383418 | Method and apparatus for prefetching data to a lower level cache memory | Kenneth J. Janik, K S Venkatraman, Anwar Rohillah, Eric Sprangle | 2008-06-03 |
| 7181598 | Prediction of load-store dependencies in a processing agent | Stephan Jourdan, Darrell D. Boggs, John A. Miller | 2007-02-20 |
| 6981129 | Breaking replay dependency loops in a processor using a rescheduled replay queue | Darrell D. Boggs, Douglas M. Carmean, Per Hammarlund, Francis X. McKeen, David J. Sager | 2005-12-27 |
| 6877086 | Method and apparatus for rescheduling multiple micro-operations in a processor using a replay queue and a counter | Darrell D. Boggs, Douglas M. Carmean, Per Hammarlund, Francis X. McKeen, David J. Sager | 2005-04-05 |