Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MZ

Ming Zeng — 29 Patents

Intel: 15 patents #2,763 of 30,777Top 9%
K(Kawasaki Robotics (Usa): 12 patents #3 of 45Top 7%
Kawasaki: 11 patents #149 of 2,943Top 6%
San Jose, CA: #2,125 of 32,062 inventorsTop 7%
California: #18,137 of 386,348 inventorsTop 5%
Overall (All Time): #127,851 of 4,157,543Top 4%
29 Patents All Time
Ming Zeng has been granted 29 US patents while listed as an inventor at Intel. The first was granted in 2001 and the most recent in March 2024. Ming Zeng ranks #127,851 of 4,157,543 US inventors in our database (top 3.1%). Patent records list Ming Zeng in San Jose, CA, US.

Issued Patents All Time

Showing 1–25 of 29 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11926039 Robot Haruhiko TAN, Hajime Nakahara, Avish Ashok Bharwani 2024-03-12
11427412 Substrate conveying robot and substrate conveying method Masaya Yoshida, Avish Ashok Bharwani, Brandon J. Lee, Ryan Le 2022-08-30
11335578 Substrate transfer apparatus and method of measuring positional deviation of substrate Masaya Yoshida, Avish Ashok Bharwani, Simon Jeyapalan, Hajime Nakahara 2022-05-17
11207775 Method of teaching robot Takeshi Shibata, Yukimasa Yamada, Takao Yamaguchi, Tomokazu Arita, Eric Chan +3 more 2021-12-28
10636693 Substrate transfer device and control method therefor Tetsuya Yoshida, Avish Ashok Bharwani 2020-04-28
D875185 Card delivering toy 2020-02-11
D875267 Facial blemish removing device 2020-02-11
10549427 Substrate transfer robot Tetsuya Yoshida, Hajime Nakahara 2020-02-04
10403539 Robot diagnosing method Tetsuya Yoshida, Hajime Nakahara, Antonio John Lozano, Tomozaku Arita 2019-09-03
10381257 Substrate conveying robot and substrate processing system with pair of blade members arranged in position out of vertical direction Mark TANG, Eric Chan, Shigeki Ono, Shinya Kitano, Hirohiko Goto 2019-08-13
10020216 Robot diagnosing method Kazuo Fujimori, Avish Ashok Bharwani, Hajime Nakahara, Tomokazu Arita 2018-07-10
10014205 Substrate conveyance robot and operating method thereof Masaya Yoshida, Takao Yamaguchi, Yuji Tanaka, Hajime Nakahara, Avish Ashok Bharwani +1 more 2018-07-03
9929034 Substrate transfer device Hirohiko Goto, Avish Ashok Bharwani, Shigeki Ono 2018-03-27
9002504 Method of wafer system interlock for the protection of equipment and product in semiconductor processing bridge tool Thomas Miu, Shinya Kitano, Simon Jeyapalan, Avish Ashok Bharwani 2015-04-07
6970029 Variable-delay signal generators and methods of operation therefor Bheem Patel, Tsung C. Whang 2005-11-29 $29,558,000
6777975 Input-output bus interface to bridge different process technologies Sanjay Dabral, Ramesh Senthinathan, Andrew M. Volk 2004-08-17 $19,443,000
6704277 Testing for digital signaling Sanjay Dabral, Chung-Wai Yue 2004-03-09 $36,606,000
6670558 Inline and “Y” input-output bus topology Sanjay Dabral, Dillip Sampath, Zale Schoenborn 2003-12-30 $55,813,000
6624717 Impedance matched bus traces over de-gassing holes Sanjay Dabral, Dillip Sampath, Zale Schoenborn 2003-09-23 $27,638,000
6601196 Method and apparatus for debugging ternary and high speed busses Sanjay Dabral, Ramesh Senthinathan, Keith Self, Ernest Khaw, Chung-Wai Yue 2003-07-29 $49,479,000
6561410 Low cost and high speed 3 load printed wiring board bus topology Sanjay Dabral 2003-05-13 $40,032,000
6507219 Charge sharing and charge recycling for an on-chip bus Sanjay Dabral, Subramaniam Maiyuran 2003-01-14 $60,878,000
6434016 Apparatus for interconnecting multiple devices on a circuit board Sanjay Dabral 2002-08-13 $41,871,000
6417688 Method and apparatus for implementing a highly robust, fast, and economical five load bus topology based on bit mirroring and a well terminated transmission environment Sanjay Dabral 2002-07-09 $52,281,000
6417462 Low cost and high speed 3-load printed wiring board bus topology Sanjay Dabral 2002-07-09 $52,281,000