Issued Patents All Time
Showing 476–495 of 495 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10157493 | Adaptive multisampling based on vertex attributes | Prasoonkumar Surti, Abhishek R. Appu | 2018-12-18 |
| 10152822 | Motion biased foveated renderer | Prasoonkumar Surti, Karthik Vaidyanathan, Atsuo Kuwahara, Hugues Labbe, Sameer Kp +10 more | 2018-12-11 |
| 10134115 | Progressive multisample anti-aliasing | Abhishek R. Appu, Prasoonkumar Surti, Michael J. Norris | 2018-11-20 |
| 10109039 | Display engine surface blending and adaptive texel to pixel ratio sample rate system, apparatus and method | Travis T. Schluessler, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Abhishek R. Appu +2 more | 2018-10-23 |
| 10108850 | Recognition, reidentification and security enhancements using autonomous machines | Barnan Das, Mayuresh M. Varerkar, Narayan Biswal, Stanley J. Baran, Gokcen Cilingir +11 more | 2018-10-23 |
| 10102609 | Low granularity coarse depth test efficiency enhancement | Vasanth Ranganathan, Saikat Mandal, Karol A. Szerszen, Saurabh Sharma, Vamsee Vardhan Chivukula +3 more | 2018-10-16 |
| 10102149 | Replacement policies for a hybrid hierarchical cache | Abhishek R. Appu, James Valerio, Altug Koker, Prasoonkumar Surti, Balaji Vembu +3 more | 2018-10-16 |
| 10089115 | Apparatus to optimize GPU thread shared local memory access | Abhishek R. Appu, James Valerio, Bharath Narasimha Swamy | 2018-10-02 |
| 10043232 | Compute cluster preemption within a general-purpose graphics processing unit | Murali Ramadoss, Balaji Vembu, Eric C. Samson, Kun Tian, David J. Cowperthwaite +4 more | 2018-08-07 |
| 9971711 | Tightly-coupled distributed uncore coherent fabric | Ramadass Nagarajan, Michael T. Klinglesmith | 2018-05-15 |
| 9916876 | Ultra low power architecture to support always on path to memory | Suketu Partiwala, Prashanth Kalluraya, Bruce L. Fleming, Shreekant S. Thakkar, Kenneth D. Shoemaker +2 more | 2018-03-13 |
| 9734079 | Hybrid exclusive multi-level memory architecture with memory management | Dannie Gerrit Feekes, Shlomo Raikin, Blaise Fanning, Julius Mandelblat, Ariel Berkovits +3 more | 2017-08-15 |
| 9680652 | Dynamic heterogeneous hashing functions in ranges of system memory addressing space | Jorge Parra, Ramadass Nagarajan | 2017-06-13 |
| 9626316 | Managing shared resources between multiple processing devices | Inder M. Sodhi, Varghese George | 2017-04-18 |
| 9600413 | Common platform for one-level memory architecture and two-level memory architecture | Varghese George, Inder M. Sodhi, Jeffrey R. Wilcox | 2017-03-21 |
| 9563251 | Representing a cache line bit pattern via meta signaling | Saher Abu Rahme, Christopher E. Cox | 2017-02-07 |
| 9542336 | Isochronous agent data pinning in a multi-level memory system | Marc Torrant, David Puffer, Blaise Fanning, Bryan R. White, Neil Schaper +3 more | 2017-01-10 |
| 9424209 | Dynamic heterogeneous hashing functions in ranges of system memory addressing space | Jorge Parra, Ramadass Nagarajan | 2016-08-23 |
| 9343126 | Frequency selection granularity for integrated circuits | Harikrishna B. Baliga, Peter J. Smith | 2016-05-17 |
| 9032099 | Writeback mechanisms for improving far memory utilization in multi-level memory architectures | Jorge Parra, Marc Torrant | 2015-05-12 |