Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12418478 | Interconnect network for multi-tile system on chips | Abhishek Reddy Pamu, Lakshminarayana Pappu, David J. Harriman | 2025-09-16 |
| 11372674 | Method, apparatus and system for handling non-posted memory write transactions in a fabric | Robert P. Adler, Robert De Gruijl, Sridhar Lakshmanamurthy, Peter J. Elardo | 2022-06-28 |
| 10846126 | Method, apparatus and system for handling non-posted memory write transactions in a fabric | Robert P. Adler, Robert De Gruijl, Sridhar Lakshmanamurthy, Peter J. Elardo | 2020-11-24 |
| 10133670 | Low overhead hierarchical connectivity of cache coherent agents to a coherent fabric | Jose Niell, Michael T. Klinglesmith, Derek T. Bachand, Ganesh Kumar | 2018-11-20 |
| 10078356 | Apparatus and method for saving and restoring data for power saving in a processor | Vinit Mathew Abraham | 2018-09-18 |
| 9971711 | Tightly-coupled distributed uncore coherent fabric | Michael T. Klinglesmith, Joydeep Ray | 2018-05-15 |
| 9785223 | Power management in an uncore fabric | Jeremy J. Shrall, Erik G. Hallnor, Vinit Mathew Abraham, Ezra N. Harrington | 2017-10-10 |
| 9680652 | Dynamic heterogeneous hashing functions in ranges of system memory addressing space | Jorge Parra, Joydeep Ray | 2017-06-13 |
| 9563579 | Method, apparatus, system for representing, specifying and using deadlines | Daniel F. Cutter, Blaise Fanning, Ravishankar Iyer, Quang T. Le, Ravi Kolagotla +2 more | 2017-02-07 |
| 9535860 | Arbitrating memory accesses via a shared memory fabric | Daniel F. Cutter, Blaise Fanning, Jose Niell, Debra Bernstein, Deepak Limaye +2 more | 2017-01-03 |
| 9442864 | Bridging circuitry between a memory controller and request agents in a system having multiple system memory protection schemes | Uday Savagaonkar, Siddhartha Chhabra, Men Long, Alpa T. Narendra Trivedi, Carlos Ornelas +2 more | 2016-09-13 |
| 9424209 | Dynamic heterogeneous hashing functions in ranges of system memory addressing space | Jorge Parra, Joydeep Ray | 2016-08-23 |
| 9405688 | Method, apparatus, system for handling address conflicts in a distributed memory fabric architecture | Robert Milstrey, Michael T. Klinglesmith | 2016-08-02 |
| 9075952 | Controlling bandwidth allocations in a system on a chip (SoC) | Jose Niell | 2015-07-07 |
| 8180997 | Dynamically composing processor cores to form logical processors | Douglas C. Burger, Stephen W. Keckler, Robert Gregory McDonald, Paul Gratz, Nitya Ranganathan +4 more | 2012-05-15 |
| 8055881 | Computing nodes for executing groups of instructions | Douglas C. Burger, Stephen W. Keckler, Karthikevan Sankaralingam | 2011-11-08 |