GS

Georg Seidemann

IN Intel: 75 patents #345 of 30,777Top 2%
Infineon Technologies Ag: 5 patents #1,696 of 7,486Top 25%
📍 Landshut, DE: #2 of 266 inventorsTop 1%
Overall (All Time): #22,339 of 4,157,543Top 1%
80
Patents All Time

Issued Patents All Time

Showing 26–50 of 80 patents

Patent #TitleCo-InventorsDate
11177220 Vertical and lateral interconnects between dies Andreas Wolter, Bernd Waidhas, Thomas Wagner 2021-11-16
11145577 Lead frame with angular deflections and wrapped printed wiring boards for system-in-package apparatus Sonja Koller, Reinhard Mahnkopf, Bernd Waidhas 2021-10-12
11134573 Printed wiring-board islands for connecting chip packages and methods of assembling same Sonja Koller, Bernd Waidhas 2021-09-28
11127813 Semiconductor inductors Bernd Waidhas, Thomas Wagner, Andreas Wolter, Andreas Augustin 2021-09-21
11107763 Interconnect structure for stacked die in a microelectronic device Thomas Wagner, Andreas Wolter 2021-08-31
11081541 Method of providing partial electrical shielding Veronica Sciriha 2021-08-03
11031699 Antenna with graded dielectirc and method of making the same Saravana Maruthamuthu, Bernd Waidhas, Andreas Augustin 2021-06-08
11018114 Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory Bernd Waidhas, Andreas Augustin, Laurent Millou, Andreas Wolter, Reinhard Mahnkopf +2 more 2021-05-25
10854590 Semiconductor die package with more than one hanging die Sven Albers, Klaus Reingruber, Richard Patten, Christian Geissler 2020-12-01
10816742 Integrated circuit packages including an optical redistribution layer Christian Geissler, Sven Albers, Thomas Wagner, Marc Dittes, Klaus Reingruber +2 more 2020-10-27
10727197 Embedded-bridge substrate connectors and methods of assembling same Bernd Waidhas, Andreas Wolter, Thomas Wagner, Stephan Stoeckl, Laurent Millou 2020-07-28
10714455 Integrated circuit package assemblies including a chip recess Klaus Reingruber 2020-07-14
10700159 Method of providing partial electrical shielding Veronica Sciriha 2020-06-30
10672731 Wafer level package structure with internal conductive layer Sven Albers, Klaus Reingruber, Christian Geissler, Richard Patten 2020-06-02
10658201 Carrier substrate for a semiconductor device and a method for forming a carrier substrate for a semiconductor device Sonja Koller, Bernd Waidhas 2020-05-19
10651102 Interposer with conductive routing exposed on sidewalls Klaus Reingruber, Christian Geissler, Sonja Koller 2020-05-12
10629731 Power mesh-on-die trace bumping Bernd Waidhas, Sonja Koller 2020-04-21
10553538 Semiconductor package having a variable redistribution layer thickness Klaus Reingruber, Sven Albers, Christian Geissler, Bernd Waidhas, Thomas Wagner +1 more 2020-02-04
10546826 Device containing and method of providing carbon covered copper layer 2020-01-28
10522485 Electrical device and a method for forming an electrical device Christian Geissler, Sven Albers, Andreas Wolter, Klaus Reingruber, Thomas Wagner +1 more 2019-12-31
10522454 Microelectronic package having a passive microelectronic device disposed within a package body Thorsten Meyer, Gerald Ofner, Andreas Wolter, Sven Albers, Christian Geissler 2019-12-31
10490527 Vertical wire connections for integrated circuit package Christian Geissler, Sven Albers, Andreas Wolter, Klaus Reingruber, Thomas Wagner +1 more 2019-11-26
10446541 Advanced node cost reduction by ESD interposer Christian Geissler, Klaus Reingruber 2019-10-15
10431545 Cross-connected multi-chip modules coupled by silicon bent-bridge interconnects and methods of assembling same Bernd Waidhas, Thomas Wagner, Andreas Wolter, Laurent Millou 2019-10-01
10411000 Microelectronic package with illuminated backside exterior Marc Dittes, Sven Albers, Christian Geissler, Andreas Wolter, Klaus Reingruber +2 more 2019-09-10