Issued Patents All Time
Showing 76–100 of 126 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10565283 | Processors, methods, systems, and instructions to generate sequences of consecutive integers in numerical order | Seth Abraham, Robert Valentine, Elmoustapha Ould-Ahmed-Vall, Zeev Sperber | 2020-02-18 |
| 10521226 | Efficient implementation of complex vector fused multiply add and complex vector multiply | Raanan Sade, Thierry Pons, Zeev Sperber, Mark J. Charney, Robert Valentine +1 more | 2019-12-31 |
| 10514912 | Vector multiplication with accumulation in large register space | Shay Gueron, Vlad Krasnov, Robert Valentine, Zeev Sperber, Simon Rubanovich | 2019-12-24 |
| 10474459 | Apparatus and method of improved permute instructions | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal, Bret L. Toll, Mark J. Charney +1 more | 2019-11-12 |
| 10474463 | Apparatus and method for down conversion of data types | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Tal Uliel, Jesus Corbal, Zeev Sperber | 2019-11-12 |
| 10459728 | Apparatus and method of improved insert instructions | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal, Bret L. Toll, Mark J. Charney +1 more | 2019-10-29 |
| 10324718 | Packed rotate processors, methods, systems, and instructions | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal San Andrian, Suleyman Sair, Bret L. Toll +2 more | 2019-06-18 |
| 10324857 | Linear memory address transformation and management | Joseph Nuzman, Raanan Sade, Igor Yanover, Ron Gabor | 2019-06-18 |
| 10318244 | Multiply add functional unit capable of executing scale, round, getexp, round, getmant, reduce, range and class instructions | Cristina S. Anderson, Zeev Sperber, Simon Rubanovich, Benny Eitan | 2019-06-11 |
| 10303471 | Systems, apparatuses, and methods for performing a double blocked sum of absolute differences | Elmoustapha Ould-Ahmed-Vall, Mostafa Hagog, Robert Valentine, Simon Rubanovich, Zeev Sperber | 2019-05-28 |
| 10275216 | Floating point scaling processors, methods, systems, and instructions | Cristina S. Anderson, Robert Valentine, Simon Rubanovich, Benny Eitan | 2019-04-30 |
| 10228909 | Floating point scaling processors, methods, systems, and instructions | Cristina S. Anderson, Robert Valentine, Simon Rubanovich, Benny Eitan | 2019-03-12 |
| 10223112 | Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset | Seth Abraham, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Zeev Sperber | 2019-03-05 |
| 10223111 | Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset | Seth Abraham, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Zeev Sperber | 2019-03-05 |
| 10209986 | Floating point rounding processors, methods, systems, and instructions | Jesus Corbal San Adrian, Cristina S. Anderson, Robert Valentine, Bret L. Toll, Simon Rubanovich +1 more | 2019-02-19 |
| 10203955 | Methods, apparatus, instructions and logic to provide vector packed tuple cross-comparison functionality | Robert Valentine, Christopher J. Hughes, Mark J. Charney, Zeev Sperber, Simon Rubanovich +2 more | 2019-02-12 |
| 10157059 | Instruction and logic for early underflow detection and rounder bypass | Simon Rubanovich, Thierry Pons, Zeev Sperber | 2018-12-18 |
| 10133577 | Vector mask driven clock gating for power efficiency of a processor | Jesus Corbal, Dennis R. Bradford, Jonathan C. Hall, Thomas D. Fletcher, Brian J. Hickmann +1 more | 2018-11-20 |
| 10095516 | Vector multiplication with accumulation in large register space | Shay Gueron, Vlad Krasnov, Robert Valentine, Zeev Sperber, Simon Rubanovich | 2018-10-09 |
| 10089076 | Floating point scaling processors, methods, systems, and instructions | Cristina S. Anderson, Robert Valentine, Simon Rubanovich, Benny Eitan | 2018-10-02 |
| 10073695 | Floating point round-off amount determination processors, methods, systems, and instructions | Cristina S. Anderson, Bret L. Toll, Robert Valentine, Simon Rubanovich | 2018-09-11 |
| 9996320 | Fused multiply-add (FMA) low functional unit | Cristina S. Anderson, Marius Cornea-Hasegan, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal +5 more | 2018-06-12 |
| 9996319 | Floating point (FP) add low instructions functional unit | Cristina S. Anderson, Marius Cornea-Hasegan, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal +5 more | 2018-06-12 |
| 9946540 | Apparatus and method of improved permute instructions with multiple granularities | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal, Bret L. Toll, Mark J. Charney +1 more | 2018-04-17 |
| 9929745 | Apparatus and method for vector compression | Simon Rubanovich, David M. Russinoff, John W. O'Leary, Zeev Sperber | 2018-03-27 |