SA

Seth Abraham

IN Intel: 22 patents #1,785 of 30,777Top 6%
Overall (All Time): #181,119 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12086594 Vector friendly instruction format and execution thereof Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more 2024-09-10
11740904 Vector friendly instruction format and execution thereof Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more 2023-08-29
11650820 Processors, methods, systems, and instructions to generate sequences of integers in numerical order that differ by a constant stride Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Zeev Sperber, Amit Gradstein 2023-05-16
11210096 Vector friendly instruction format and execution thereof Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more 2021-12-28
11055203 Virtualizing precise event based sampling Matthew C. Merten, Beeman C. Strong, Michael W. Chynoweth, Grant G. Zhou, Andreas Kleen +5 more 2021-07-06
10866807 Processors, methods, systems, and instructions to generate sequences of integers in numerical order that differ by a constant stride Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Zeev Sperber, Amit Gradstein 2020-12-15
10795680 Vector friendly instruction format and execution thereof Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more 2020-10-06
10732970 Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Zeev Sperber, Amit Gradstein 2020-08-04
10565283 Processors, methods, systems, and instructions to generate sequences of consecutive integers in numerical order Robert Valentine, Elmoustapha Ould-Ahmed-Vall, Zeev Sperber, Amit Gradstein 2020-02-18
10496522 Virtualizing precise event based sampling Matthew C. Merten, Beeman C. Strong, Michael W. Chynoweth, Grant G. Zhou, Andreas Kleen +5 more 2019-12-03
10223112 Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Zeev Sperber, Amit Gradstein 2019-03-05
10223111 Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Zeev Sperber, Amit Gradstein 2019-03-05
9965375 Virtualizing precise event based sampling Matthew C. Merten, Beeman C. Strong, Michael W. Chynoweth, Grant G. Zhou, Andreas Kleen +5 more 2018-05-08
9904547 Packed data rearrangement control indexes generation processors, methods, systems and instructions Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Zeev Sperber, Amit Gradstein 2018-02-27
9898283 Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Zeev Sperber, Amit Gradstein 2018-02-20
9639354 Packed data rearrangement control indexes precursors generation processors, methods, systems, and instructions Robert Valentine, Elmoustapha Ould-Ahmed-Vall, Zeev Sperber, Amit Gradstein 2017-05-02
9513917 Vector friendly instruction format and execution thereof Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more 2016-12-06
9465680 Method and apparatus for processor performance monitoring Michael W. Chynoweth, Jonathan D. Combs, Angela D. Schmid, Kimberly C. Weier, Ahmad Yasin +3 more 2016-10-11
7367021 Method and apparatus for generating multiple processor-specific code segments in a single executable Zia Ansari, Kevin B. Smith 2008-04-29
6633896 Method and system for multiplying large numbers Stephen F. Moore 2003-10-14
6473897 Method and apparatus for generating multiple processor-specific code segments in a single executable Zia Ansari, Kevin B. Smith 2002-10-29
6049668 Method and apparatus for supporting multiple processor-specific code segments in a single executable Kevin B. Smith, Clark Nelson 2000-04-11
6026487 Computer program product and method for efficiently selecting one action from among alternative actions Kumar Balasubramanian 2000-02-15