Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9376314 | Method for manufacturing a micromechanical system | Thoralf Kautzsch, Heiko Froehlich, Maik Stegemann, Boris Binder | 2016-06-28 |
| 9330929 | Systems and methods for horizontal integration of acceleration sensor structures | Thoralf Kautzsch, Heiko Fröhlich, Maik Stegemann, Andre Röth, Steffen Bieselt | 2016-05-03 |
| 9209778 | Microelectromechanical resonators | Thoralf Kautzsch, Heiko Froehlich, Maik Stegemann, Thomas Santa, Markus Burian | 2015-12-08 |
| 9136136 | Method and structure for creating cavities with extreme aspect ratios | Thoralf Kautzsch, Heiko Fröhlich, Maik Stegemann | 2015-09-15 |
| 9107335 | Method for manufacturing an integrated circuit and an integrated circuit | Marko Lemke, Stefan Tegen | 2015-08-11 |
| 7858514 | Integrated circuit, intermediate structure and a method of fabricating a semiconductor structure | Ulrike Roessner, Daniel Koehler, Ilona Juergensen | 2010-12-28 |
| 7538034 | Integrated circuit having a metal element | Yung-Chang Wang, Stephan Hartmann | 2009-05-26 |
| 7368390 | Photolithographic patterning process using a carbon hard mask layer of diamond-like hardness produced by a plasma-enhanced deposition process | Guenther Czech, Carsten Fuelber, Markus Kirchhoff, Maik Stegemann, Stephan Wege | 2008-05-06 |
| 7294553 | Plasma-enhanced chemical vapour deposition process for depositing silicon nitride or silicon oxynitride, process for producing one such layer arrangement, and layer arrangement | — | 2007-11-13 |
| 7220664 | Fabrication method for semiconductor structure in a substrate, the semiconductor structure having at least two regions that are to be patterned differently | Stephan Hartmann, Dirk Offenberg | 2007-05-22 |
| 7205243 | Process for producing a mask on a substrate | — | 2007-04-17 |
| 7105279 | Method for fabricating a patterned layer on a semiconductor substrate | Alexander Hausmann | 2006-09-12 |
| 7037777 | Process for producing an etching mask on a microstructure, in particular a semiconductor structure with trench capacitors, and corresponding use of the etching mask | Hans-Peter Moll, Momtchil Stavrev, Stephan Wege | 2006-05-02 |
| 7018781 | Method for fabricating a contact hole plane in a memory module | Hans-Georg Fröhlich, Oliver Genz, Werner Graf, Stefan Gruss, Matthias Handke +6 more | 2006-03-28 |
| 6861206 | Method for producing a structured layer on a semiconductor substrate | — | 2005-03-01 |
| 6245640 | Method for fabricating a semiconductor structure | Wilhelm Claussen, Barbara Lorenz, Klaus Penner, Hans-Peter Sperlich | 2001-06-12 |