Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12033972 | Chip package, method of forming a chip package and method of forming an electrical contact | Joachim Mahler, Michael Bauer, Jochen Dangelmaier, Reimund Engl, Johann Gatterbauer +6 more | 2024-07-09 |
| 12034066 | Power semiconductor device having a barrier region | Markus Beninger-Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Alexander Philippou +1 more | 2024-07-09 |
| 11594621 | Method of processing a power semiconductor device | Markus Beninger-Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Alexander Philippou +1 more | 2023-02-28 |
| 11581428 | IGBT with dV/dt controllability | Alexander Philippou, Markus Beninger-Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven +3 more | 2023-02-14 |
| 11469317 | RC IGBT | Frank Pfirsch, Erich Griebl, Viktoryia Lapidus, Anton Mauder, Christian Philipp Sandow | 2022-10-11 |
| 10978418 | Method of forming an electrical contact and method of forming a chip package with a metal contact structure and protective layer | Joachim Mahler, Michael Bauer, Jochen Dangelmaier, Reimund Engl, Johann Gatterbauer +6 more | 2021-04-13 |
| 10930772 | IGBT having a barrier region | Alexander Philippou, Christian Jaeger, Johannes Georg Laven | 2021-02-23 |
| 10910487 | Power semiconductor device having trench electrodes biased at three different electrical potentials, and method of manufacturing the same | Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Max Christian Seifert | 2021-02-02 |
| 10854739 | Method for producing IGBT with dV/dt controllability | Markus Beninger-Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Alexander Philippou +1 more | 2020-12-01 |
| 10840362 | IGBT with dV/dt controllability | Alexander Philippou, Markus Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven +3 more | 2020-11-17 |
| 10615272 | Method for producing IGBT with dV/dt controllability | Markus Bina, Matteo Dainese, Christian Jaeger, Johannes Georg Laven, Alexander Philippou +1 more | 2020-04-07 |
| 10608104 | Trench transistor device | Alexander Philippou, Johannes Georg Laven, Christian Jaeger, Frank Wolter, Frank Pfirsch | 2020-03-31 |
| 10461056 | Chip package and method of forming a chip package with a metal contact structure and protective layer, and method of forming an electrical contact | Joachim Mahler, Michael Bauer, Jochen Dangelmaier, Reimund Engl, Johann Gatterbauer +6 more | 2019-10-29 |
| 10439055 | IGBT with dV/dt controllability | Alexander Philippou, Christian Jaeger, Johannes Georg Laven | 2019-10-08 |
| 10347754 | Power semiconductor device with dV/dt controllability through select trench electrode biasing, and method of manufacturing the same | Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Max Christian Seifert | 2019-07-09 |
| 10224206 | Bipolar transistor device with an emitter having two types of emitter regions | Roman Baburske, Christian Jaeger, Franz-Josef Niedernostheide, Hans-Joachim Schulze | 2019-03-05 |
| 9899504 | Power semiconductor transistor having increased bipolar amplification | Roman Baburske, Johannes Georg Laven, Hans-Joachim Schulze | 2018-02-20 |
| 9741571 | Bipolar transistor device with an emitter having two types of emitter regions | Roman Baburske, Christian Jaeger, Franz-Josef Niedernostheide, Hans-Joachim Schulze | 2017-08-22 |
| 9653568 | Method of manufacturing an insulated gate bipolar transistor with mesa sections between cell trench structures | Johannes Georg Laven, Alexander Philippou, Hans-Joachim Schulze, Christian Jaeger, Roman Baburske | 2017-05-16 |
| 9647100 | Semiconductor device with auxiliary structure including deep level dopants | Hans-Joachim Schulze, Christian Jaeger, Franz-Josef Niedernostheide, Roman Baburske, Andre Rainer Stegner | 2017-05-09 |
| 9553179 | Semiconductor device and insulated gate bipolar transistor with barrier structure | Johannes Georg Laven, Roman Baburske, Alexander Philippou | 2017-01-24 |
| 9263552 | MOS-transistor with separated electrodes arranged in a trench | — | 2016-02-16 |
| 9076838 | Insulated gate bipolar transistor with mesa sections between cell trench structures and method of manufacturing | Johannes Georg Laven, Alexander Philippou, Hans-Joachim Schulze, Christian Jaeger, Roman Baburske | 2015-07-07 |