WW

Wei Wu

IC Ice Computer: 2 patents #3 of 4Top 75%
HT Htc: 1 patents #822 of 1,407Top 60%
Chevron: 1 patents #2,615 of 4,788Top 55%
📍 Portland, OR: #344 of 9,213 inventorsTop 4%
🗺 Oregon: #707 of 28,073 inventorsTop 3%
Overall (All Time): #55,077 of 4,157,543Top 2%
49
Patents All Time

Issued Patents All Time

Showing 26–49 of 49 patents

Patent #TitleCo-InventorsDate
10129036 Post-processing mechanism for physically unclonable functions Jiangtao Li, Patrick Koeberl 2018-11-13
10083140 DRAM data path sharing via a segmented global data bus Shigeki Tomishima, Shih-Lien Linus Lu 2018-09-25
10001806 Computing device with two or more display panels Shang-Che Cheng, Chia-Ming Lin 2018-06-19
9992031 Dark bits to reduce physically unclonable function error rates Kevin C. Gotze, Gregory M. Iovino, David Johnston, Patrick Koeberl, Jiangtao Li 2018-06-05
9965415 DRAM data path sharing via a split local data bus and a segmented global data bus Shigeki Tomishima, Shih-Lien Linus Lu 2018-05-08
9934827 DRAM data path sharing via a split local data bus Shigeki Tomishima, Shih-Lien Linus Lu 2018-04-03
9934082 Apparatus and method for detecting single flip-error in a complementary resistive memory Shigeki Tomishima, Charles Augustine, Shih-Lien Linus Lu 2018-04-03
9830988 Apparatus to reduce retention failure in complementary resistive memory Charles Augustine, Shigeki Tomishima, Shih-Lien Linus Lu, James W. Tschanz 2017-11-28
9654143 Consecutive bit error detection and correction Guillem Sole, Roger Espasa, Sorin Iacobovici, Brian J. Hickmann, Thomas D. Fletcher 2017-05-16
9529660 Apparatus and method for detecting single flip-error in a complementary resistive memory Shigeki Tomishima, Charles Augustine, Shih-Lien Linus Lu 2016-12-27
9514796 Magnetic storage cell memory with back hop-prevention Charles Augustine, Shigeki Tomishima, Shih-Lien Linus Lu, James W. Tschanz, Georgios Panagopoulos +1 more 2016-12-06
9373395 Apparatus to reduce retention failure in complementary resistive memory Charles Augustine, Shigeki Tomishima, Shih-Lien L. Liu, James W. Tschanz 2016-06-21
9251095 Providing metadata in a translation lookaside buffer (TLB) David Champagne, Abhishek Tiwari, Christopher J. Hughes, Sanjeev Kumar, Shih-Lien Linus Lu 2016-02-02
9048834 Grouping of physically unclonable functions Jiangtao Li, Patrick Koeberl, Sanu K. Mathew 2015-06-02
9043674 Error detection and correction apparatus and method Shih-Lien Linus Lu, Rajat Agarwal, Henry Stracovsky 2015-05-26
8819392 Providing metadata in a translation lookaside buffer (TLB) David Champagne, Abhishek Tiwari, Christopher J. Hughes, Sanjeev Kumar, Shih-Lien Linus Lu 2014-08-26
8806285 Dynamically allocatable memory error mitigation Alaa R. Alameldeen, Ilya Wagner, Zeshan A. Chishti, Christopher B. Wilkerson 2014-08-12
8762821 Method of correcting adjacent errors by using BCH-based error correction coding Shih-Lien Linus Lu, Muhammad M. Khellah 2014-06-24
8640005 Method and apparatus for using cache memory in a system that supports a low power state Christopher B. Wilkerson, Alaa R. Alameldeen, Zeshan A. Chishti, Dinesh Somasekhar, Shih-Lien Linus Lu 2014-01-28
8533572 Error correcting code logic for processor caches that uses a common set of check bits Shih-Lien Linus Lu 2013-09-10
8250334 Providing metadata in a translation lookaside buffer (TLB) David Champagne, Abhishek Tiwari, Christopher J. Hughes, Sanjeev Kumar, Shih-Lien Linus Lu 2012-08-21
8245111 Performing multi-bit error correction on a cache line Zeshan A. Chishti, Alaa R. Alameldeen, Chris Wilkerson, Dinesh Somasekhar, Muhammad M. Khellah +1 more 2012-08-14
8138239 Polymer thermal interface materials Ed Prack, Yi Li 2012-03-20
7941631 Providing metadata in a translation lookaside buffer (TLB) David Champagne, Abhishek Tiwari, Christopher J. Hughes, Sanjeev Kumar, Shih-Lien Linus Lu 2011-05-10