Issued Patents All Time
Showing 101–125 of 185 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8086783 | High availability memory system | James A. O'Connor, Kevin C. Gower, Luis A. Lastras-Montano | 2011-12-27 |
| 8082482 | System for performing error correction operations in a memory hub device of a memory module | Kevin C. Gower | 2011-12-20 |
| 8055922 | Power management via DIMM read operation limiter | Mark A. Brittain | 2011-11-08 |
| 8023358 | System and method for providing a non-power-of-two burst length in a memory system | Kyu-hyoun Kim, Paul W. Coteus, Kenneth L. Wright | 2011-09-20 |
| 8024527 | Partial cache line accesses based on memory access patterns | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Jerry Don Lewis | 2011-09-20 |
| 8019919 | Method for enhancing the memory bandwidth available through a memory module | Kevin C. Gower | 2011-09-13 |
| 7984329 | System and method for providing DRAM device-level repair via address remappings external to the device | Luis A. Lastras-Montano, Darren L. Anand, Jeffrey H. Dreibelbis, Charles A. Kilmer, Robert B. Tremaine | 2011-07-19 |
| 7958309 | Dynamic selection of a memory access size | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Jerry Don Lewis | 2011-06-07 |
| 7934070 | Streaming reads for early processing in a cascaded memory subsystem with buffered memory devices | Mark A. Brittain, Edgar R. Cordero, Sanjeev Ghai | 2011-04-26 |
| 7930470 | System to enable a memory hub device to manage thermal conditions at a memory device level transparent to a memory controller | Mark A. Brittain, Kevin C. Gower | 2011-04-19 |
| 7930469 | System to provide memory system power reduction without reducing overall memory system performance | Mark A. Brittain, Kevin C. Gower | 2011-04-19 |
| 7925826 | System to increase the overall bandwidth of a memory channel by allowing the memory channel to operate at a frequency independent from a memory device frequency | Mark A. Brittain, Kevin C. Gower | 2011-04-12 |
| 7925825 | System to support a full asynchronous interface within a memory hub device | Mark A. Brittain, Kevin C. Gower | 2011-04-12 |
| 7925824 | System to reduce latency by running a memory channel frequency fully asynchronous from a memory device frequency | Mark A. Brittain, Kevin C. Gower | 2011-04-12 |
| 7899983 | Buffered memory module supporting double the memory device data width in the same physical space as a conventional memory module | Kevin C. Gower | 2011-03-01 |
| 7890676 | Memory systems for automated computing machinery | Daniel M. Dreps, Kevin C. Gower, Robert B. Tremaine | 2011-02-15 |
| 7865674 | System for enhancing the memory bandwidth available through a memory module | Kevin C. Gower | 2011-01-04 |
| 7861014 | System for supporting partial cache line read operations to a memory module to reduce read data traffic on a memory channel | Kevin C. Gower | 2010-12-28 |
| 7844771 | System, method and storage medium for a memory subsystem command interface | Kevin C. Gower | 2010-11-30 |
| 7840860 | Double DRAM bit steering for multiple error corrections | Luiz C. Alves, Mark A. Brittain, Timothy J. Dell, Sanjeev Ghai, Scott Barnett Swaney | 2010-11-23 |
| 7840748 | Buffered memory module with multiple memory device data interface ports supporting double the memory capacity | Kevin C. Gower | 2010-11-23 |
| 7818497 | Buffered memory module supporting two independent memory channels | Kevin C. Gower | 2010-10-19 |
| 7779292 | Efficient storage of metadata in a system memory | James Stephen Fields, Jr., Sanjeev Ghai, Jeffrey A. Stuecheli | 2010-08-17 |
| 7770077 | Using cache that is embedded in a memory hub to replace failed memory cells in a memory subsystem | Ravi Kumar Arimilli, Kevin C. Gower | 2010-08-03 |
| 7765368 | System, method and storage medium for providing a serialized memory interface with a bus repeater | Kevin C. Gower, Kevin W. Kark, Mark W. Kellogg | 2010-07-27 |