Issued Patents All Time
Showing 51–75 of 185 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9733870 | Error vector readout from a memory device | Michael B. Healy, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim | 2017-08-15 |
| 9691453 | Efficient calibration of memory devices | John S. Bialas, Jr., David D. Cadigan, Stephen P. Glancy, Gary A. Van Huben | 2017-06-27 |
| 9690649 | Memory device error history bit | Michael B. Healy, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim | 2017-06-27 |
| 9684555 | Selective memory error reporting | Michael B. Healy, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim | 2017-06-20 |
| 9627030 | Efficient calibration of a data eye for memory devices | John S. Bialas, Jr., David D. Cadigan, Stephen P. Glancy, Gary A. Van Huben | 2017-04-18 |
| 9626242 | Memory device error history bit | Michael B. Healy, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim | 2017-04-18 |
| 9620184 | Efficient calibration of memory devices | John S. Bialas, Jr., David D. Cadigan, Stephen P. Glancy, Gary A. Van Huben | 2017-04-11 |
| 9607716 | Detecting defective connections in stacked memory devices | Charles A. Kilmer, Saravanan Sethuraman | 2017-03-28 |
| 9606851 | Error monitoring of a memory device containing embedded error correction | Michael B. Healy, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim | 2017-03-28 |
| 9558850 | Efficient calibration of a data eye for memory devices | John S. Bialas, Jr., David D. Cadigan, Stephen P. Glancy, Gary A. Van Huben | 2017-01-31 |
| 9495242 | Adaptive error correction in a memory system | John K. DeBrosse, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim, Rona Yaari | 2016-11-15 |
| 9471423 | Selective memory error reporting | Michael B. Healy, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim | 2016-10-18 |
| 9471422 | Adaptive error correction in a memory system | John K. DeBrosse, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim, Rona Yaari | 2016-10-18 |
| 9454422 | Error feedback and logging with memory on-chip error checking and correcting (ECC) | Paul W. Coteus, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim, Luis A. Lastras-Montano +1 more | 2016-09-27 |
| 9298395 | Memory system connector | Paul W. Coteus, Shawn A. Hall, Hillery C. Hunter, Douglas J. Joseph, Charles A. Kilmer +2 more | 2016-03-29 |
| 9263157 | Detecting defective connections in stacked memory devices | Charles A. Kilmer, Saravanan Sethuraman | 2016-02-16 |
| 9251894 | Accessing a resistive memory storage device | Charles A. Kilmer, Kyu-hyoun Kim | 2016-02-02 |
| 9189327 | Error-correcting code distribution for memory systems | Paul W. Coteus, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim, Kenneth L. Wright | 2015-11-17 |
| 9159410 | Accessing a resistive memory storage device | Charles A. Kilmer, Kyu-hyoun Kim | 2015-10-13 |
| 9146883 | Securing the contents of a memory device | Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim +1 more | 2015-09-29 |
| 9146882 | Securing the contents of a memory device | Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim +1 more | 2015-09-29 |
| 9128834 | Implementing memory module communications with a host processor in multiported memory configurations | John Steven Dodson, Luis A. Lastras-Montano, Adam J. McPadden, Kenneth L. Wright | 2015-09-08 |
| 9064602 | Implementing memory device with sub-bank architecture | Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim | 2015-06-23 |
| 8890316 | Implementing decoupling devices inside a TSV DRAM stack | Joab D. Henderson, Kyu-hyoun Kim, Kenneth L. Wright | 2014-11-18 |
| 8892821 | Method and system for thread-based memory speculation in a memory subsystem of a data processing system | Ravi Kumar Arimilli, Sanjeev Ghai | 2014-11-18 |