Issued Patents All Time
Showing 151–175 of 185 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7337293 | Streaming reads for early processing in a cascaded memory subsystem with buffered memory devices | Mark A. Brittain, Edgar R. Cordero, Sanjeev Ghai | 2008-02-26 |
| 7331010 | System, method and storage medium for providing fault detection and correction in a memory subsystem | Timothy J. Dell, Kevin C. Gower | 2008-02-12 |
| 7308557 | Method and apparatus for invalidating entries within a translation control entry (TCE) cache | Richard Louis Arndt, George William Daly, James Stephen Fields, Jr. | 2007-12-11 |
| 7299313 | System, method and storage medium for a memory subsystem command interface | Kevin C. Gower | 2007-11-20 |
| 7296129 | System, method and storage medium for providing a serialized memory interface with a bus repeater | Kevin C. Gower, Kevin W. Kark, Mark W. Kellogg | 2007-11-13 |
| 7277988 | System, method and storage medium for providing data caching and data compression in a memory subsystem | Kevin C. Gower, Mark W. Kellogg, Thomas Basil Smith, III, Robert B. Tremaine | 2007-10-02 |
| 7130967 | Method and system for supplier-based memory speculation in a memory subsystem of a data processing system | Ravi Kumar Arimilli, Sanjeev Ghai | 2006-10-31 |
| 6675270 | Dram with memory independent burst lengths for reads versus writes | Ravi Kumar Arimilli | 2004-01-06 |
| 6622222 | Sequencing data on a shared data bus via a memory buffer to prevent data overlap during multiple memory read operations | Ravi Kumar Arimilli, James Stephen Fields, Jr. | 2003-09-16 |
| 6581116 | Method and apparatus for high performance transmission of ordered packets on a bus within a data processing system | Ravi Kumar Arimilli, Vicente Enrique Chung | 2003-06-17 |
| 6487679 | Error recovery mechanism for a high-performance interconnect | Ravi Kumar Arimilli, Vicente Enrique Chung | 2002-11-26 |
| 6334167 | System and method for memory self-timed refresh for reduced power consumption | Edward T. Gerchman, Mark C. Gildea, William Paul Hovis, Randall S. Jensen, Thomas James Osten +1 more | 2001-12-25 |
| 6282600 | Method and apparatus of resolving conflicting register access requests from a service processor and system processor | Roy Stuart Moore, David Wayne Victor, Edward Hugh Welbon | 2001-08-28 |
| 6276844 | Clustered, buffered simms and assemblies thereof | Paul W. Coteus, Ralph Herman Genz, Alphonso P. Lanzetta, Daniel Phipps, James K. Tam +1 more | 2001-08-21 |
| 6226695 | Information handling system including non-disruptive command and data movement between storage and one or more auxiliary processors | John Michael Kaiser, David Wayne Victor | 2001-05-01 |
| 6178126 | Memory and system configuration for programming a redundancy address in an electric system | Toshiaki Kirihata, Paul W. Coteus, Steven W. Tomashot | 2001-01-23 |
| 6098115 | System for reducing storage access latency with accessing main storage and data bus simultaneously | Raymond J. Eberhard, John Michael Kaiser, Eddie Wong, Vincent P. Zeyak, Jr. | 2000-08-01 |
| 6061757 | Handling interrupts by returning and requeuing currently executing interrupts for later resubmission when the currently executing interrupts are of lower priority than newly generated pending interrupts | Ravi Kumar Arimilli, John Michael Kaiser | 2000-05-09 |
| 6052762 | Method and apparatus for reducing system snoop latency | Ravi Kumar Arimilli, John Michael Kaiser | 2000-04-18 |
| 5978938 | Fault isolation feature for an I/O or system bus | John Michael Kaiser | 1999-11-02 |
| 5954825 | Method for isolating faults on a clocked synchronous bus | John Michael Kaiser | 1999-09-21 |
| 5949272 | Bidirectional off-chip driver with receiver bypass | Harry R. Bickford, Paul W. Coteus, Robert Dominick Mirabella | 1999-09-07 |
| 5915126 | Computer system memory controller and method of burst data ordering translation | David Wayne Victor | 1999-06-22 |
| 5898896 | Method and apparatus for data ordering of I/O transfers in Bi-modal Endian PowerPC systems | John Michael Kaiser, Robert Dominick Mirabella, David Wayne Victor | 1999-04-27 |
| 5864686 | Method for dynamic address coding for memory mapped commands directed to a system bus and/or secondary bused | John Michael Kaiser | 1999-01-26 |