Issued Patents All Time
Showing 25 most recent of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11100626 | Systems and methods for monitoring manufacturing processes | Jeffrey L. Roepke, Joel D. Millett | 2021-08-24 |
| 6658536 | Cache-coherency protocol with recently read state for extending cache horizontally | Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis | 2003-12-02 |
| 6314495 | Method and apparatus for executing multiply-initiated, multiply-sourced variable delay system bus operations | Ravi Kumar Arimilli, Derek E. Williams | 2001-11-06 |
| 6286068 | Queued arbitration mechanism for data processing system | Ravi Kumar Arimilli | 2001-09-04 |
| 6226695 | Information handling system including non-disruptive command and data movement between storage and one or more auxiliary processors | Warren E. Maule, David Wayne Victor | 2001-05-01 |
| 6202131 | Method and apparatus for executing variable delay system bus operations of differing type or character without dead lock using shared buffers | Ravi Kumar Arimilli, Derek E. Williams | 2001-03-13 |
| 6178485 | Method and apparatus for executing singly-initiated, singly-sourced variable delay system bus operations of differing character | Ravi Kumar Arimilli, Derek E. Williams | 2001-01-23 |
| 6141714 | Method and apparatus for executing self-snooped unresolvable system bus operations | Ravi Kumar Arimilli, Derek E. Williams | 2000-10-31 |
| 6128705 | Method and apparatus for executing multiply-initiated, multiply-sourced variable delay system bus operations | Ravi Kumar Arimilli, Derek E. Williams | 2000-10-03 |
| 6098115 | System for reducing storage access latency with accessing main storage and data bus simultaneously | Raymond J. Eberhard, Warren E. Maule, Eddie Wong, Vincent P. Zeyak, Jr. | 2000-08-01 |
| 6061757 | Handling interrupts by returning and requeuing currently executing interrupts for later resubmission when the currently executing interrupts are of lower priority than newly generated pending interrupts | Ravi Kumar Arimilli, Warren E. Maule | 2000-05-09 |
| 6052762 | Method and apparatus for reducing system snoop latency | Ravi Kumar Arimilli, Warren E. Maule | 2000-04-18 |
| 6029217 | Queued arbitration mechanism for data processing system | Ravi Kumar Arimilli | 2000-02-22 |
| 5996049 | Cache-coherency protocol with recently read state for data and instructions | Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis | 1999-11-30 |
| 5978938 | Fault isolation feature for an I/O or system bus | Warren E. Maule | 1999-11-02 |
| 5963974 | Cache intervention from a cache line exclusively holding an unmodified value | Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis | 1999-10-05 |
| 5954825 | Method for isolating faults on a clocked synchronous bus | Warren E. Maule | 1999-09-21 |
| 5946709 | Shared intervention protocol for SMP bus using caches, snooping, tags and prioritizing | Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis | 1999-08-31 |
| 5943685 | Method of shared intervention via a single data provider among shared caches for SMP bus | Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis | 1999-08-24 |
| 5940856 | Cache intervention from only one of many cache lines sharing an unmodified value | Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis | 1999-08-17 |
| 5940864 | Shared memory-access priorization method for multiprocessors using caches and snoop responses | Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis | 1999-08-17 |
| 5898896 | Method and apparatus for data ordering of I/O transfers in Bi-modal Endian PowerPC systems | Warren E. Maule, Robert Dominick Mirabella, David Wayne Victor | 1999-04-27 |
| 5864686 | Method for dynamic address coding for memory mapped commands directed to a system bus and/or secondary bused | Warren E. Maule | 1999-01-26 |
| 5790892 | Information handling system for modifying coherency response set to allow intervention of a read command so that the intervention is not allowed by the system memory | Warren E. Maule | 1998-08-04 |
| 5784710 | Process and apparatus for address extension | Warren E. Maule | 1998-07-21 |