Issued Patents All Time
Showing 26–50 of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10438972 | Sub-fin removal for SOI like isolation with uniform active fin height | Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, Eric R. Miller +1 more | 2019-10-08 |
| 10424663 | Super long channel device within VFET architecture | Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, Eric R. Miller +1 more | 2019-09-24 |
| 10396181 | Forming stacked nanowire semiconductor device | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2019-08-27 |
| 10381437 | Semiconductor device and method of forming the semiconductor device | Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Eric R. Miller, Robert R. Robison +1 more | 2019-08-13 |
| 10304689 | Margin for fin cut using self-aligned triple patterning | Gauri Karve, Fee Li Lie, Eric R. Miller, Stuart A. Sieg, John R. Sporre | 2019-05-28 |
| 10269931 | Vertical transport field effect transistor with precise gate length definition | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, John R. Sporre | 2019-04-23 |
| 10256326 | Forming stacked nanowire semiconductor device | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2019-04-09 |
| 10249762 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Kangguo Cheng, Eric R. Miller, John R. Sporre | 2019-04-02 |
| 10249738 | Nanosheet channel-to-source and drain isolation | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, John R. Sporre | 2019-04-02 |
| 10242882 | Cyclic etch process to remove dummy gate oxide layer for fin field effect transistor fabrication | Zhenxing Bi, Donald F. Canaperi, Thamarai S. Devarajan | 2019-03-26 |
| 10217634 | Fin patterns with varying spacing without fin cut | Marc A. Bergendahl, Kangguo Cheng, John R. Sporre | 2019-02-26 |
| 10211055 | Fin patterns with varying spacing without fin cut | Marc A. Bergendahl, Kangguo Cheng, John R. Sporre | 2019-02-19 |
| 10199503 | Under-channel gate transistors | Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, Eric R. Miller +1 more | 2019-02-05 |
| 10141445 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Kangguo Cheng, Eric R. Miller, John R. Sporre | 2018-11-27 |
| 10141230 | Method and structure to enable dual channel Fin critical dimension control | Marc A. Bergendahl, Kangguo Cheng, John R. Sporre | 2018-11-27 |
| 10083962 | Fabrication of fin field effect transistors for complementary metal oxide semiconductor devices including separate n-type and p-type source/drains using a single spacer deposition | Kangguo Cheng, Fee Li Lie, Eric R. Miller | 2018-09-25 |
| 10074730 | Forming stacked nanowire semiconductor device | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2018-09-11 |
| 10043801 | Air gap spacer for metal gates | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, John R. Sporre | 2018-08-07 |
| 10026615 | Fin patterns with varying spacing without Fin cut | Marc A. Bergendahl, Kangguo Cheng, John R. Sporre | 2018-07-17 |
| 10014391 | Vertical transport field effect transistor with precise gate length definition | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, John R. Sporre | 2018-07-03 |
| 9997369 | Margin for fin cut using self-aligned triple patterning | Gauri Karve, Fee Li Lie, Eric R. Miller, Stuart A. Sieg, John R. Sporre | 2018-06-12 |
| 9991117 | Fin patterns with varying spacing without fin cut | Marc A. Bergendahl, Kangguo Cheng, John R. Sporre | 2018-06-05 |
| 9984877 | Fin patterns with varying spacing without fin cut | Marc A. Bergendahl, Kangguo Cheng, John R. Sporre | 2018-05-29 |
| 9985138 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Kangguo Cheng, Eric R. Miller, John R. Sporre | 2018-05-29 |
| 9953915 | Electrically conductive interconnect including via having increased contact surface area | Hsueh-Chung Chen, James J. Demarest, Chih-Chao Yang | 2018-04-24 |